irqchip/gic-v4.1: Add VPE residency callback

Making a VPE resident on GICv4.1 is pretty simple, as it is just a
single write to the local redistributor. We just need extra information
about which groups to enable, which the KVM code will have to provide.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20191224111055.11836-12-maz@kernel.org

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index 5ef706e..3adc597 100644 (file)
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -3624,12 +3624,29 @@ static void its_vpe_4_1_unmask_irq(struct irq_data *d)
        its_vpe_4_1_send_inv(d);
 }
 
+static void its_vpe_4_1_schedule(struct its_vpe *vpe,
+                                struct its_cmd_info *info)
+{
+       void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
+       u64 val = 0;
+
+       /* Schedule the VPE */
+       val |= GICR_VPENDBASER_Valid;
+       val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0;
+       val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0;
+       val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);
+
+       gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
+}
+
 static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info)
 {
+       struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
        struct its_cmd_info *info = vcpu_info;
 
        switch (info->cmd_type) {
        case SCHEDULE_VPE:
+               its_vpe_4_1_schedule(vpe, info);
                return 0;
 
        case DESCHEDULE_VPE:

diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 1f17181..822dae6 100644 (file)
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -327,6 +327,15 @@
 #define GICR_VPENDBASER_IDAI           (1ULL << 62)
 #define GICR_VPENDBASER_Valid          (1ULL << 63)
 
+/*
+ * GICv4.1 VPENDBASER, used for VPE residency. On top of these fields,
+ * also use the above Valid, PendingLast and Dirty.
+ */
+#define GICR_VPENDBASER_4_1_DB         (1ULL << 62)
+#define GICR_VPENDBASER_4_1_VGRP0EN    (1ULL << 59)
+#define GICR_VPENDBASER_4_1_VGRP1EN    (1ULL << 58)
+#define GICR_VPENDBASER_4_1_VPEID      GENMASK_ULL(15, 0)
+
 /*
  * ITS registers, offsets from ITS_base
  */

diff --git a/include/linux/irqchip/arm-gic-v4.h b/include/linux/irqchip/arm-gic-v4.h
index 498e523..d9c3496 100644 (file)
--- a/include/linux/irqchip/arm-gic-v4.h
+++ b/include/linux/irqchip/arm-gic-v4.h
@@ -100,6 +100,11 @@ struct its_cmd_info {
        union {
                struct its_vlpi_map     *map;
                u8                      config;
+               bool                    req_db;
+               struct {
+                       bool            g0en;
+                       bool            g1en;
+               };
        };
 };