drm/amd/display: force TBT4 dock dsc on

[why]
TBT4 dock have bandwidth limitation, need dsc always on to support all
modes.

[how]
force dsc always on when detect TBT4 dock.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Fudongwang <Fudong.Wang@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
index 41bd95e..50fa854 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
@@ -1166,6 +1166,7 @@ struct dpcd_caps {
        int8_t branch_dev_name[6];
        int8_t branch_hw_revision;
        int8_t branch_fw_revision[2];
+       int8_t branch_vendor_specific_data[4];
 
        bool allow_invalid_MSA_timing_param;
        bool panel_mode_edp;
@@ -1358,6 +1359,9 @@ struct dp_trace {
 #ifndef DP_TUNNELING_IRQ
 #define DP_TUNNELING_IRQ                               (1 << 5)
 #endif
+#ifndef DP_BRANCH_VENDOR_SPECIFIC_START
+#define DP_BRANCH_VENDOR_SPECIFIC_START     0x50C
+#endif
 /** USB4 DPCD BW Allocation Registers Chapter 10.7 **/
 #ifndef DP_TUNNELING_CAPABILITIES
 #define DP_TUNNELING_CAPABILITIES                      0xE000D /* 1.4a */

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
index d21ee9d..e026c72 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_detection.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_detection.c
@@ -48,6 +48,9 @@
 #include "dm_helpers.h"
 #include "clk_mgr.h"
 
+ // Offset DPCD 050Eh == 0x5A
+#define MST_HUB_ID_0x5A  0x5A
+
 #define DC_LOGGER \
        link->ctx->logger
 #define DC_LOGGER_INIT(logger)
@@ -692,6 +695,15 @@ static void apply_dpia_mst_dsc_always_on_wa(struct dc_link *link)
                        link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
                        !link->dc->debug.dpia_debug.bits.disable_mst_dsc_work_around)
                link->wa_flags.dpia_mst_dsc_always_on = true;
+
+       if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA &&
+               link->type == dc_connection_mst_branch &&
+               link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_90CC24 &&
+               link->dpcd_caps.branch_vendor_specific_data[2] == MST_HUB_ID_0x5A &&
+               link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT &&
+               !link->dc->debug.dpia_debug.bits.disable_mst_dsc_work_around) {
+                       link->wa_flags.dpia_mst_dsc_always_on = true;
+       }
 }
 
 static void revert_dpia_mst_dsc_always_on_wa(struct dc_link *link)

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
index fe4aa2c..2868414 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
@@ -1207,6 +1207,13 @@ static void get_active_converter_info(
                        dp_hw_fw_revision.ieee_fw_rev,
                        sizeof(dp_hw_fw_revision.ieee_fw_rev));
        }
+
+       core_link_read_dpcd(
+               link,
+               DP_BRANCH_VENDOR_SPECIFIC_START,
+               (uint8_t *)link->dpcd_caps.branch_vendor_specific_data,
+               sizeof(link->dpcd_caps.branch_vendor_specific_data));
+
        if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_14 &&
                        link->dpcd_caps.dongle_type != DISPLAY_DONGLE_NONE) {
                union dp_dfp_cap_ext dfp_cap_ext;