i2c: mediatek: Add access to more than 8GB dram in i2c driver
authorQii Wang <qii.wang@mediatek.com>
Wed, 5 Aug 2020 10:52:20 +0000 (18:52 +0800)
committerWolfram Sang <wsa@kernel.org>
Wed, 5 Aug 2020 21:39:26 +0000 (23:39 +0200)
Newer MTK chip support more than 8GB of dram. Replace support_33bits
with more general dma_max_support and remove mtk_i2c_set_4g_mode.

Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Qii Wang <qii.wang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
drivers/i2c/busses/i2c-mt65xx.c

index e6b984a..463860e 100644 (file)
@@ -55,7 +55,6 @@
 #define I2C_DMA_INT_FLAG_NONE          0x0000
 #define I2C_DMA_CLR_FLAG               0x0000
 #define I2C_DMA_HARD_RST               0x0002
-#define I2C_DMA_4G_MODE                        0x0001
 
 #define MAX_SAMPLE_CNT_DIV             8
 #define MAX_STEP_CNT_DIV               64
@@ -204,11 +203,11 @@ struct mtk_i2c_compatible {
        unsigned char dcm: 1;
        unsigned char auto_restart: 1;
        unsigned char aux_len_reg: 1;
-       unsigned char support_33bits: 1;
        unsigned char timing_adjust: 1;
        unsigned char dma_sync: 1;
        unsigned char ltiming_adjust: 1;
        unsigned char apdma_sync: 1;
+       unsigned char max_dma_support;
 };
 
 struct mtk_i2c_ac_timing {
@@ -311,11 +310,11 @@ static const struct mtk_i2c_compatible mt2712_compat = {
        .dcm = 1,
        .auto_restart = 1,
        .aux_len_reg = 1,
-       .support_33bits = 1,
        .timing_adjust = 1,
        .dma_sync = 0,
        .ltiming_adjust = 0,
        .apdma_sync = 0,
+       .max_dma_support = 33,
 };
 
 static const struct mtk_i2c_compatible mt6577_compat = {
@@ -325,11 +324,11 @@ static const struct mtk_i2c_compatible mt6577_compat = {
        .dcm = 1,
        .auto_restart = 0,
        .aux_len_reg = 0,
-       .support_33bits = 0,
        .timing_adjust = 0,
        .dma_sync = 0,
        .ltiming_adjust = 0,
        .apdma_sync = 0,
+       .max_dma_support = 32,
 };
 
 static const struct mtk_i2c_compatible mt6589_compat = {
@@ -339,11 +338,11 @@ static const struct mtk_i2c_compatible mt6589_compat = {
        .dcm = 0,
        .auto_restart = 0,
        .aux_len_reg = 0,
-       .support_33bits = 0,
        .timing_adjust = 0,
        .dma_sync = 0,
        .ltiming_adjust = 0,
        .apdma_sync = 0,
+       .max_dma_support = 32,
 };
 
 static const struct mtk_i2c_compatible mt7622_compat = {
@@ -353,11 +352,11 @@ static const struct mtk_i2c_compatible mt7622_compat = {
        .dcm = 1,
        .auto_restart = 1,
        .aux_len_reg = 1,
-       .support_33bits = 0,
        .timing_adjust = 0,
        .dma_sync = 0,
        .ltiming_adjust = 0,
        .apdma_sync = 0,
+       .max_dma_support = 32,
 };
 
 static const struct mtk_i2c_compatible mt8173_compat = {
@@ -366,11 +365,11 @@ static const struct mtk_i2c_compatible mt8173_compat = {
        .dcm = 1,
        .auto_restart = 1,
        .aux_len_reg = 1,
-       .support_33bits = 1,
        .timing_adjust = 0,
        .dma_sync = 0,
        .ltiming_adjust = 0,
        .apdma_sync = 0,
+       .max_dma_support = 33,
 };
 
 static const struct mtk_i2c_compatible mt8183_compat = {
@@ -380,11 +379,11 @@ static const struct mtk_i2c_compatible mt8183_compat = {
        .dcm = 0,
        .auto_restart = 1,
        .aux_len_reg = 1,
-       .support_33bits = 1,
        .timing_adjust = 1,
        .dma_sync = 1,
        .ltiming_adjust = 1,
        .apdma_sync = 0,
+       .max_dma_support = 33,
 };
 
 static const struct of_device_id mtk_i2c_of_match[] = {
@@ -796,11 +795,6 @@ static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk)
        return 0;
 }
 
-static inline u32 mtk_i2c_set_4g_mode(dma_addr_t addr)
-{
-       return (addr & BIT_ULL(32)) ? I2C_DMA_4G_MODE : I2C_DMA_CLR_FLAG;
-}
-
 static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
                               int num, int left_num)
 {
@@ -885,8 +879,8 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
                        return -ENOMEM;
                }
 
-               if (i2c->dev_comp->support_33bits) {
-                       reg_4g_mode = mtk_i2c_set_4g_mode(rpaddr);
+               if (i2c->dev_comp->max_dma_support > 32) {
+                       reg_4g_mode = upper_32_bits(rpaddr);
                        writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE);
                }
 
@@ -908,8 +902,8 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
                        return -ENOMEM;
                }
 
-               if (i2c->dev_comp->support_33bits) {
-                       reg_4g_mode = mtk_i2c_set_4g_mode(wpaddr);
+               if (i2c->dev_comp->max_dma_support > 32) {
+                       reg_4g_mode = upper_32_bits(wpaddr);
                        writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE);
                }
 
@@ -954,11 +948,11 @@ static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs,
                        return -ENOMEM;
                }
 
-               if (i2c->dev_comp->support_33bits) {
-                       reg_4g_mode = mtk_i2c_set_4g_mode(wpaddr);
+               if (i2c->dev_comp->max_dma_support > 32) {
+                       reg_4g_mode = upper_32_bits(wpaddr);
                        writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE);
 
-                       reg_4g_mode = mtk_i2c_set_4g_mode(rpaddr);
+                       reg_4g_mode = upper_32_bits(rpaddr);
                        writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE);
                }
 
@@ -1232,8 +1226,9 @@ static int mtk_i2c_probe(struct platform_device *pdev)
                return -EINVAL;
        }
 
-       if (i2c->dev_comp->support_33bits) {
-               ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(33));
+       if (i2c->dev_comp->max_dma_support > 32) {
+               ret = dma_set_mask(&pdev->dev,
+                               DMA_BIT_MASK(i2c->dev_comp->max_dma_support));
                if (ret) {
                        dev_err(&pdev->dev, "dma_set_mask return error.\n");
                        return ret;