drm/amdgpu: add JPEG2.0 decode ring test

Use register from JPEG tile, the UVD tile reg won't work for JPEG

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 1d575e2..ef2b7a9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -631,19 +631,17 @@ int amdgpu_vcn_jpeg_ring_test_ring(struct amdgpu_ring *ring)
        unsigned i;
        int r;
 
-       WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9), 0xCAFEDEAD);
+       WREG32(adev->vcn.external.jpeg_pitch, 0xCAFEDEAD);
        r = amdgpu_ring_alloc(ring, 3);
-
        if (r)
                return r;
 
-       amdgpu_ring_write(ring,
-               PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9), 0, 0, 0));
+       amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.jpeg_pitch, 0));
        amdgpu_ring_write(ring, 0xDEADBEEF);
        amdgpu_ring_commit(ring);
 
        for (i = 0; i < adev->usec_timeout; i++) {
-               tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_SCRATCH9));
+               tmp = RREG32(adev->vcn.external.jpeg_pitch);
                if (tmp == 0xDEADBEEF)
                        break;
                DRM_UDELAY(1);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index b14655a..cc94841 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -93,6 +93,7 @@ struct amdgpu_vcn_reg{
        unsigned        cmd;
        unsigned        nop;
        unsigned        scratch9;
+       unsigned        jpeg_pitch;
 };
 
 struct amdgpu_vcn {

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 2a2c40c..855b1f9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -154,6 +154,8 @@ static int vcn_v1_0_sw_init(void *handle)
                return r;
 
        adev->vcn.pause_dpg_mode = vcn_v1_0_pause_dpg_mode;
+       adev->vcn.internal.jpeg_pitch = adev->vcn.external.jpeg_pitch =
+               SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_PITCH);
 
        return 0;
 }