drm/i915/adlp+/dp_mst: Align slave transcoder sequences with spec wrt. DP2 config
authorImre Deak <imre.deak@intel.com>
Wed, 30 Oct 2024 19:23:12 +0000 (21:23 +0200)
committerImre Deak <imre.deak@intel.com>
Wed, 6 Nov 2024 16:13:36 +0000 (18:13 +0200)
On ADLP+ during modeset enabling and disabling, enable and disable the DP2
configuration for MST slave transcoders as required by the specification.

Update the documentation of intel_ddi_config_transcoder_func() /
intel_ddi_disable_transcoder_func() based on the above. While at it also
clarify the programming steps of these functions specific to transcoder
types.

v2:
- Enable/disable the DP2 config from
  intel_ddi_config_transcoder_func()/intel_ddi_disable_transcoder_func().
  (Jani)
- Handle all ADLP+ platforms in one patch, instead of doing that
  separately wrt. PTL.

Bspec: 55424, 54128, 65448, 68849
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241030192313.4030617-5-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c

index 8ae7877..3198353 100644 (file)
@@ -621,7 +621,8 @@ void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
 
 /*
  * Same as intel_ddi_enable_transcoder_func(), but it does not set the enable
- * bit.
+ * bit for the DDI function and enables the DP2 configuration. Called for all
+ * transcoder types.
  */
 void
 intel_ddi_config_transcoder_func(struct intel_encoder *encoder,
@@ -632,12 +633,20 @@ intel_ddi_config_transcoder_func(struct intel_encoder *encoder,
        enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
        u32 ctl;
 
+       intel_ddi_config_transcoder_dp2(crtc_state, true);
+
        ctl = intel_ddi_transcoder_func_reg_val_get(encoder, crtc_state);
        ctl &= ~TRANS_DDI_FUNC_ENABLE;
        intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
                       ctl);
 }
 
+/*
+ * Disable the DDI function and port syncing.
+ * For SST, pre-TGL MST, TGL+ MST-slave transcoders: deselect the DDI port,
+ * SST/MST mode and disable the DP2 configuration. For TGL+ MST-master
+ * transcoders these are done later in intel_ddi_post_disable_dp().
+ */
 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
 {
        struct intel_display *display = to_intel_display(crtc_state);
@@ -674,6 +683,9 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
        intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder),
                       ctl);
 
+       if (intel_dp_mst_is_slave_trans(crtc_state))
+               intel_ddi_config_transcoder_dp2(crtc_state, false);
+
        if (intel_has_quirk(display, QUIRK_INCREASE_DDI_DISABLED_TIME) &&
            intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
                drm_dbg_kms(display->drm, "Quirk Increase DDI disabled time\n");
@@ -2587,10 +2599,6 @@ static void mtl_ddi_pre_enable_dp(struct intel_atomic_state *state,
 
        /*
         * 6.b If DP v2.0/128b mode - Configure TRANS_DP2_CTL register settings.
-        */
-       intel_ddi_config_transcoder_dp2(crtc_state, true);
-
-       /*
         * 6.c Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST
         * Transport Select
         */
@@ -2725,8 +2733,6 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
         */
        intel_ddi_enable_transcoder_clock(encoder, crtc_state);
 
-       intel_ddi_config_transcoder_dp2(crtc_state, true);
-
        /*
         * 7.b Configure TRANS_DDI_FUNC_CTL DDI Select, DDI Mode Select & MST
         * Transport Select