net: marvell10g: soft-reset the PHY when coming out of low power
authorRussell King <rmk+kernel@armlinux.org.uk>
Tue, 14 Apr 2020 19:49:08 +0000 (20:49 +0100)
committerDavid S. Miller <davem@davemloft.net>
Tue, 14 Apr 2020 23:48:09 +0000 (16:48 -0700)
Soft-reset the PHY when coming out of low power mode, which seems to
be necessary with firmware versions 0.3.3.0 and 0.3.10.0.

This depends on ("net: marvell10g: report firmware version")

Fixes: c9cc1c815d36 ("net: phy: marvell10g: place in powersave mode at probe")
Reported-by: Matteo Croce <mcroce@redhat.com>
Tested-by: Matteo Croce <mcroce@redhat.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/marvell10g.c

index 748532d..95e3f46 100644 (file)
@@ -75,7 +75,8 @@ enum {
 
        /* Vendor2 MMD registers */
        MV_V2_PORT_CTRL         = 0xf001,
-       MV_V2_PORT_CTRL_PWRDOWN = 0x0800,
+       MV_V2_PORT_CTRL_SWRST   = BIT(15),
+       MV_V2_PORT_CTRL_PWRDOWN = BIT(11),
        MV_V2_TEMP_CTRL         = 0xf08a,
        MV_V2_TEMP_CTRL_MASK    = 0xc000,
        MV_V2_TEMP_CTRL_SAMPLE  = 0x0000,
@@ -239,8 +240,17 @@ static int mv3310_power_down(struct phy_device *phydev)
 
 static int mv3310_power_up(struct phy_device *phydev)
 {
-       return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
-                                 MV_V2_PORT_CTRL_PWRDOWN);
+       struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
+       int ret;
+
+       ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
+                                MV_V2_PORT_CTRL_PWRDOWN);
+
+       if (priv->firmware_ver < 0x00030000)
+               return ret;
+
+       return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
+                               MV_V2_PORT_CTRL_SWRST);
 }
 
 static int mv3310_reset(struct phy_device *phydev, u32 unit)