ARM: dts: imx: Pass a label to the soc node
authorFabio Estevam <festevam@denx.de>
Tue, 14 Jun 2022 16:22:33 +0000 (13:22 -0300)
committerShawn Guo <shawnguo@kernel.org>
Mon, 20 Jun 2022 00:35:39 +0000 (08:35 +0800)
Pass a label to the 'soc' node to make it easier to reference
it from other devicetree files.

U-Boot, for example usually needs to access the AIPS node to
pass U-Boot-specific properties.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
14 files changed:
arch/arm/boot/dts/imx25.dtsi
arch/arm/boot/dts/imx27.dtsi
arch/arm/boot/dts/imx31.dtsi
arch/arm/boot/dts/imx50.dtsi
arch/arm/boot/dts/imx51.dtsi
arch/arm/boot/dts/imx53.dtsi
arch/arm/boot/dts/imx6dl.dtsi
arch/arm/boot/dts/imx6q.dtsi
arch/arm/boot/dts/imx6qdl.dtsi
arch/arm/boot/dts/imx6sx.dtsi
arch/arm/boot/dts/imx6ul.dtsi
arch/arm/boot/dts/imx6ull.dtsi
arch/arm/boot/dts/imx7d.dtsi
arch/arm/boot/dts/imx7s.dtsi

index fa8044c..bc4de0c 100644 (file)
@@ -68,7 +68,7 @@
                };
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index b660c7d..6270685 100644 (file)
@@ -74,7 +74,7 @@
                };
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index 2adb923..b5ece07 100644 (file)
@@ -48,7 +48,7 @@
                reg = <0x68000000 0x100000>;
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index be0de0f..4409090 100644 (file)
@@ -94,7 +94,7 @@
                status = "okay";
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index 1e20a66..a6d8a60 100644 (file)
                ports = <&ipu_di0>, <&ipu_di1>;
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index 67487f3..b183bbe 100644 (file)
                status = "okay";
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index fdd81fd..8e0ed20 100644 (file)
@@ -80,7 +80,7 @@
                };
        };
 
-       soc {
+       soc: soc {
                ocram: sram@900000 {
                        compatible = "mmio-sram";
                        reg = <0x00900000 0x20000>;
index 9caba45..9208442 100644 (file)
                };
        };
 
-       soc {
+       soc: soc {
                ocram: sram@900000 {
                        compatible = "mmio-sram";
                        reg = <0x00900000 0x40000>;
index d27beb4..0f4f2ff 100644 (file)
                #phy-cells = <0>;
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index fc63343..4d075e2 100644 (file)
                #phy-cells = <0>;
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index 52ac0d8..c95efd1 100644 (file)
                interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
index 9bf6749..2bccd45 100644 (file)
@@ -50,7 +50,7 @@
 };
 
 / {
-       soc {
+       soc: soc {
                aips3: bus@2200000 {
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;
index f8cba47..7ceb7c0 100644 (file)
@@ -78,7 +78,7 @@
                #phy-cells = <0>;
        };
 
-       soc {
+       soc: soc {
                etm@3007d000 {
                        compatible = "arm,coresight-etm3x", "arm,primecell";
                        reg = <0x3007d000 0x1000>;
index 008e3da..d0fcc4d 100644 (file)
                             <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";