clk: clocking-wizard: move dynamic reconfig setup behind flag
authorHarry Austen <hpausten@protonmail.com>
Fri, 13 Sep 2024 19:11:42 +0000 (19:11 +0000)
committerStephen Boyd <sboyd@kernel.org>
Wed, 9 Oct 2024 23:38:56 +0000 (16:38 -0700)
Xilinx clocking wizard IP core's dynamic reconfiguration support is
optionally enabled at build time. Use the new boolean devicetree
property to indicate whether the hardware supports this feature or not.

Signed-off-by: Harry Austen <hpausten@protonmail.com>
Link: https://lore.kernel.org/r/20240913191037.2690-7-hpausten@protonmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/xilinx/clk-xlnx-clock-wizard.c

index 1a65a7d..b2233d3 100644 (file)
@@ -1146,20 +1146,6 @@ static int clk_wzrd_probe(struct platform_device *pdev)
        if (IS_ERR(clk_wzrd->base))
                return PTR_ERR(clk_wzrd->base);
 
-       ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade);
-       if (!ret) {
-               if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) {
-                       dev_warn(&pdev->dev, "invalid speed grade '%d'\n",
-                                clk_wzrd->speed_grade);
-                       clk_wzrd->speed_grade = 0;
-               }
-       }
-
-       clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1");
-       if (IS_ERR(clk_wzrd->clk_in1))
-               return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1),
-                                    "clk_in1 not found\n");
-
        clk_wzrd->axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");
        if (IS_ERR(clk_wzrd->axi_clk))
                return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->axi_clk),
@@ -1170,31 +1156,48 @@ static int clk_wzrd_probe(struct platform_device *pdev)
                return -EINVAL;
        }
 
-       ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs);
-       if (ret)
-               return ret;
-
-       clk_wzrd->clk_data.num = nr_outputs;
-       ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get, &clk_wzrd->clk_data);
-       if (ret) {
-               dev_err(&pdev->dev, "unable to register clock provider\n");
-               return ret;
-       }
+       if (!of_property_present(np, "xlnx,static-config")) {
+               ret = of_property_read_u32(np, "xlnx,speed-grade", &clk_wzrd->speed_grade);
+               if (!ret) {
+                       if (clk_wzrd->speed_grade < 1 || clk_wzrd->speed_grade > 3) {
+                               dev_warn(&pdev->dev, "invalid speed grade '%d'\n",
+                                        clk_wzrd->speed_grade);
+                               clk_wzrd->speed_grade = 0;
+                       }
+               }
 
-       if (clk_wzrd->speed_grade) {
-               clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier;
+               clk_wzrd->clk_in1 = devm_clk_get(&pdev->dev, "clk_in1");
+               if (IS_ERR(clk_wzrd->clk_in1))
+                       return dev_err_probe(&pdev->dev, PTR_ERR(clk_wzrd->clk_in1),
+                                            "clk_in1 not found\n");
 
-               ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1,
-                                                &clk_wzrd->nb);
+               ret = clk_wzrd_register_output_clocks(&pdev->dev, nr_outputs);
                if (ret)
-                       dev_warn(&pdev->dev,
-                                "unable to register clock notifier\n");
+                       return ret;
+
+               clk_wzrd->clk_data.num = nr_outputs;
+               ret = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_onecell_get,
+                                                 &clk_wzrd->clk_data);
+               if (ret) {
+                       dev_err(&pdev->dev, "unable to register clock provider\n");
+                       return ret;
+               }
 
-               ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk,
-                                                &clk_wzrd->nb);
-               if (ret)
-                       dev_warn(&pdev->dev,
-                                "unable to register clock notifier\n");
+               if (clk_wzrd->speed_grade) {
+                       clk_wzrd->nb.notifier_call = clk_wzrd_clk_notifier;
+
+                       ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->clk_in1,
+                                                        &clk_wzrd->nb);
+                       if (ret)
+                               dev_warn(&pdev->dev,
+                                        "unable to register clock notifier\n");
+
+                       ret = devm_clk_notifier_register(&pdev->dev, clk_wzrd->axi_clk,
+                                                        &clk_wzrd->nb);
+                       if (ret)
+                               dev_warn(&pdev->dev,
+                                        "unable to register clock notifier\n");
+               }
        }
 
        return 0;