ASoC: rt5682: Fix the vol+ button detection issue
authorDerek Fang <derek.fang@realtek.com>
Wed, 25 Aug 2021 04:03:46 +0000 (12:03 +0800)
committerMark Brown <broonie@kernel.org>
Wed, 25 Aug 2021 13:15:46 +0000 (14:15 +0100)
Fix the wrong button vol+ detection issue with some brand headsets
by fine tuning the threshold of button vol+ and SAR ADC button accuracy.

Signed-off-by: Derek Fang <derek.fang@realtek.com>
Link: https://lore.kernel.org/r/20210825040346.28346-1-derek.fang@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/rt5682.c

index fcf442b..e822fa1 100644 (file)
@@ -43,7 +43,9 @@ static const struct reg_sequence patch_list[] = {
        {RT5682_DAC_ADC_DIG_VOL1, 0xa020},
        {RT5682_I2C_CTRL, 0x000f},
        {RT5682_PLL2_INTERNAL, 0x8266},
-       {RT5682_SAR_IL_CMD_3, 0x8365},
+       {RT5682_SAR_IL_CMD_1, 0x22b7},
+       {RT5682_SAR_IL_CMD_3, 0x0365},
+       {RT5682_SAR_IL_CMD_6, 0x0110},
 };
 
 void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev)
@@ -1726,8 +1728,6 @@ static const struct snd_soc_dapm_widget rt5682_dapm_widgets[] = {
        SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", RT5682_STO1_ADC_DIG_VOL,
                RT5682_R_MUTE_SFT, 1, rt5682_sto1_adc_r_mix,
                ARRAY_SIZE(rt5682_sto1_adc_r_mix)),
-       SND_SOC_DAPM_SUPPLY("BTN Detection Mode", RT5682_SAR_IL_CMD_1,
-               14, 1, NULL, 0),
 
        /* ADC PGA */
        SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
@@ -1898,8 +1898,6 @@ static const struct snd_soc_dapm_route rt5682_dapm_routes[] = {
        {"Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux"},
        {"Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter"},
 
-       {"ADC Stereo1 Filter", NULL, "BTN Detection Mode"},
-
        {"Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL"},
        {"Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR"},
 
@@ -2949,7 +2947,8 @@ static int rt5682_suspend(struct snd_soc_component *component)
 
                /* enter SAR ADC power saving mode */
                snd_soc_component_update_bits(component, RT5682_SAR_IL_CMD_1,
-                       RT5682_SAR_BUTT_DET_MASK | RT5682_SAR_BUTDET_MODE_MASK | RT5682_SAR_BUTDET_RST_MASK, 0);
+                       RT5682_SAR_BUTT_DET_MASK | RT5682_SAR_BUTDET_MODE_MASK |
+                       RT5682_SAR_BUTDET_RST_MASK | RT5682_SAR_SEL_MB1_MB2_MASK, 0);
                snd_soc_component_update_bits(component, RT5682_SAR_IL_CMD_1,
                        RT5682_SAR_BUTT_DET_MASK | RT5682_SAR_BUTDET_MODE_MASK | RT5682_SAR_BUTDET_RST_MASK,
                        RT5682_SAR_BUTT_DET_EN | RT5682_SAR_BUTDET_POW_SAV | RT5682_SAR_BUTDET_RST_NORMAL);
@@ -2971,6 +2970,9 @@ static int rt5682_resume(struct snd_soc_component *component)
        regcache_sync(rt5682->regmap);
 
        if (rt5682->hs_jack && rt5682->jack_type == SND_JACK_HEADSET) {
+               snd_soc_component_update_bits(component, RT5682_SAR_IL_CMD_1,
+                       RT5682_SAR_BUTDET_MODE_MASK | RT5682_SAR_SEL_MB1_MB2_MASK,
+                       RT5682_SAR_BUTDET_POW_NORM | RT5682_SAR_SEL_MB1_MB2_AUTO);
                snd_soc_component_update_bits(component, RT5682_CBJ_CTRL_1,
                        RT5682_MB1_PATH_MASK | RT5682_MB2_PATH_MASK,
                        RT5682_CTRL_MB1_FSM | RT5682_CTRL_MB2_FSM);