LoongArch: Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs
authorYouling Tang <tangyouling@loongson.cn>
Sat, 25 Feb 2023 07:52:56 +0000 (15:52 +0800)
committerHuacai Chen <chenhuacai@loongson.cn>
Sat, 25 Feb 2023 14:12:16 +0000 (22:12 +0800)
Add JUMP_VIRT_ADDR macro implementation to avoid using la.abs directly.
This is a preparation for subsequent patches.

Signed-off-by: Youling Tang <tangyouling@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
arch/loongarch/include/asm/stackframe.h
arch/loongarch/kernel/head.S
arch/loongarch/power/suspend_asm.S

index 7deb043..0274e70 100644 (file)
@@ -7,6 +7,7 @@
 
 #include <linux/threads.h>
 
+#include <asm/addrspace.h>
 #include <asm/asm.h>
 #include <asm/asmmacro.h>
 #include <asm/asm-offsets.h>
        cfi_restore \reg \offset \docfi
        .endm
 
+/* Jump to the runtime virtual address. */
+       .macro JUMP_VIRT_ADDR temp1 temp2
+       li.d    \temp1, CACHE_BASE
+       pcaddi  \temp2, 0
+       or      \temp1, \temp1, \temp2
+       jirl    zero, \temp1, 0xc
+       .endm
+
        .macro BACKUP_T0T1
        csrwr   t0, EXCEPTION_KS0
        csrwr   t1, EXCEPTION_KS1
index aa61817..d2ac26b 100644 (file)
@@ -50,11 +50,8 @@ SYM_CODE_START(kernel_entry)                 # kernel entry point
        li.d            t0, CSR_DMW1_INIT       # CA, PLV0, 0x9000 xxxx xxxx xxxx
        csrwr           t0, LOONGARCH_CSR_DMWIN1
 
-       /* We might not get launched at the address the kernel is linked to,
-          so we jump there.  */
-       la.abs          t0, 0f
-       jr              t0
-0:
+       JUMP_VIRT_ADDR  t0, t1
+
        /* Enable PG */
        li.w            t0, 0xb0                # PLV=0, IE=0, PG=1
        csrwr           t0, LOONGARCH_CSR_CRMD
@@ -106,9 +103,8 @@ SYM_CODE_START(smpboot_entry)
        li.d            t0, CSR_DMW1_INIT       # CA, PLV0
        csrwr           t0, LOONGARCH_CSR_DMWIN1
 
-       la.abs          t0, 0f
-       jr              t0
-0:
+       JUMP_VIRT_ADDR  t0, t1
+
        /* Enable PG */
        li.w            t0, 0xb0                # PLV=0, IE=0, PG=1
        csrwr           t0, LOONGARCH_CSR_CRMD
index eb26756..90da899 100644 (file)
@@ -78,9 +78,8 @@ SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL)
        li.d            t0, CSR_DMW1_INIT       # CA, PLV0
        csrwr           t0, LOONGARCH_CSR_DMWIN1
 
-       la.abs          t0, 0f
-       jr              t0
-0:
+       JUMP_VIRT_ADDR  t0, t1
+
        la.pcrel        t0, acpi_saved_sp
        ld.d            sp, t0, 0
        SETUP_WAKEUP