drm/msm/dpu: Drop unused qseed_type from catalog dpu_caps
authorMarijn Suijten <marijn.suijten@somainline.org>
Fri, 1 Dec 2023 23:40:27 +0000 (01:40 +0200)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tue, 5 Dec 2023 00:35:48 +0000 (03:35 +0300)
The SSPP scaler subblk is responsible for reporting its version (via the
.id field, feature bits on the parent SSPP block, and since recently
also from reading a register to supersede a read-but-unset version field
in the catalog), leaving this global qseed_type field logically unused.
Remove this dead code to lighten the catalog and bringup-overhead.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/570109/
Link: https://lore.kernel.org/r/20231201234234.2065610-4-dmitry.baryshkov@linaro.org
15 files changed:
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_9_sm6375.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h

index aa18679..4dcc9f8 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps msm8998_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0x7,
-       .qseed_type = DPU_SSPP_SCALER_QSEED3,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index 38ac0c1..03159d3 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sdm845_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0xb,
-       .qseed_type = DPU_SSPP_SCALER_QSEED3,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index c022e57..4184c18 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sm8150_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0xb,
-       .qseed_type = DPU_SSPP_SCALER_QSEED3,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index cb0758f..83fb731 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sc8180x_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0xb,
-       .qseed_type = DPU_SSPP_SCALER_QSEED3,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index 94278a3..885a2be 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sm8250_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0xb,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index c0d88dd..c9d1f12 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sc7180_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0x9,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_dim_layer = true,
        .has_idle_pc = true,
        .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
index 57ce14c..320b8f2 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sm6115_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
        .max_mixer_blendstages = 0x4,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_dim_layer = true,
        .has_idle_pc = true,
        .max_linewidth = 2160,
index 62db84b..6c6bc75 100644 (file)
@@ -11,7 +11,6 @@
 static const struct dpu_caps sm6350_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0x7,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index 5a3aad3..77703f6 100644 (file)
@@ -11,7 +11,6 @@
 static const struct dpu_caps sm6375_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_LINE_WIDTH,
        .max_mixer_blendstages = 0x4,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_dim_layer = true,
        .has_idle_pc = true,
        .max_linewidth = 2160,
index 5aaa242..03181ba 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sm8350_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0xb,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index 15942fa..42bb471 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sc7280_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0x7,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_dim_layer = true,
        .has_idle_pc = true,
        .max_linewidth = 2400,
index 1ccd1ed..6da122d 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sc8280xp_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 11,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index 72b0f54..330d48b 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sm8450_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0xb,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index 69b80af..2b5b342 100644 (file)
@@ -10,7 +10,6 @@
 static const struct dpu_caps sm8550_dpu_caps = {
        .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
        .max_mixer_blendstages = 0xb,
-       .qseed_type = DPU_SSPP_SCALER_QSEED4,
        .has_src_split = true,
        .has_dim_layer = true,
        .has_idle_pc = true,
index 6244507..1bf2d2d 100644 (file)
@@ -342,7 +342,6 @@ struct dpu_rotation_cfg {
  * @max_mixer_width    max layer mixer line width support.
  * @max_mixer_blendstages max layer mixer blend stages or
  *                       supported z order
- * @qseed_type         qseed2 or qseed3 support.
  * @has_src_split      source split feature status
  * @has_dim_layer      dim layer feature status
  * @has_idle_pc        indicate if idle power collapse feature is supported
@@ -355,7 +354,6 @@ struct dpu_rotation_cfg {
 struct dpu_caps {
        u32 max_mixer_width;
        u32 max_mixer_blendstages;
-       u32 qseed_type;
        bool has_src_split;
        bool has_dim_layer;
        bool has_idle_pc;