*/
#include "base.h"
-#include <nvif/cl507c.h>
-#include <nvif/event.h>
+#include <nvif/if0014.h>
#include <nvif/push507c.h>
#include <nvif/timer.h>
struct nouveau_drm *drm, int head, s32 oclass, u32 interlock_data,
struct nv50_wndw **pwndw)
{
- struct nv50_disp_base_channel_dma_v0 args = {
- .head = head,
+ struct nvif_disp_chan_v0 args = {
+ .id = head,
};
struct nouveau_display *disp = nouveau_display(drm->dev);
struct nv50_disp *disp50 = nv50_disp(drm->dev);
return ret;
}
- ret = nvif_notify_ctor(&wndw->wndw.base.user, "kmsBaseNtfy",
- wndw->notify.func, false,
- NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT,
- &(struct nvif_notify_uevent_req) {},
- sizeof(struct nvif_notify_uevent_req),
- sizeof(struct nvif_notify_uevent_rep),
- &wndw->notify);
- if (ret)
- return ret;
-
wndw->ntfy = NV50_DISP_BASE_NTFY(wndw->id);
wndw->sema = NV50_DISP_BASE_SEM0(wndw->id);
wndw->data = 0x00000000;
#include "core.h"
#include "head.h"
-#include <nvif/cl507d.h>
+#include <nvif/if0014.h>
#include <nvif/push507c.h>
#include <nvif/timer.h>
core507d_new_(const struct nv50_core_func *func, struct nouveau_drm *drm,
s32 oclass, struct nv50_core **pcore)
{
- struct nv50_disp_core_channel_dma_v0 args = {};
+ struct nvif_disp_chan_v0 args = {};
struct nv50_disp *disp = nv50_disp(drm->dev);
struct nv50_core *core;
int ret;
#include "core.h"
#include "head.h"
-#include <nvif/cl507a.h>
+#include <nvif/if0014.h>
#include <nvif/timer.h>
#include <nvhw/class/cl507a.h>
int head, s32 oclass, u32 interlock_data,
struct nv50_wndw **pwndw)
{
- struct nv50_disp_cursor_v0 args = {
- .head = head,
+ struct nvif_disp_chan_v0 args = {
+ .id = head,
};
struct nv50_disp *disp = nv50_disp(drm->dev);
struct nv50_wndw *wndw;
#include <nvif/class.h>
#include <nvif/cl0002.h>
#include <nvif/cl5070.h>
-#include <nvif/cl507d.h>
#include <nvif/event.h>
+#include <nvif/if0014.h>
#include <nvif/timer.h>
#include <nvhw/class/cl507c.h>
struct nv50_dmac *dmac)
{
struct nouveau_cli *cli = (void *)device->object.client;
- struct nv50_disp_core_channel_dma_v0 *args = data;
+ struct nvif_disp_chan_v0 *args = data;
u8 type = NVIF_MEM_COHERENT;
int ret;
*/
#include "oimm.h"
-#include <nvif/cl507b.h>
+#include <nvif/if0014.h>
static int
oimm507b_init_(const struct nv50_wimm_func *func, struct nouveau_drm *drm,
s32 oclass, struct nv50_wndw *wndw)
{
- struct nv50_disp_overlay_v0 args = {
- .head = wndw->id,
+ struct nvif_disp_chan_v0 args = {
+ .id = wndw->id,
};
struct nv50_disp *disp = nv50_disp(drm->dev);
int ret;
#include <drm/drm_fourcc.h>
#include <drm/drm_plane_helper.h>
-#include <nvif/cl507e.h>
-#include <nvif/event.h>
+#include <nvif/if0014.h>
#include <nvif/push507c.h>
#include <nvhw/class/cl507e.h>
struct nouveau_drm *drm, int head, s32 oclass, u32 interlock_data,
struct nv50_wndw **pwndw)
{
- struct nv50_disp_overlay_channel_dma_v0 args = {
- .head = head,
+ struct nvif_disp_chan_v0 args = {
+ .id = head,
};
struct nv50_disp *disp = nv50_disp(drm->dev);
struct nv50_wndw *wndw;
return ret;
}
- ret = nvif_notify_ctor(&wndw->wndw.base.user, "kmsOvlyNtfy",
- wndw->notify.func, false,
- NV50_DISP_OVERLAY_CHANNEL_DMA_V0_NTFY_UEVENT,
- &(struct nvif_notify_uevent_req) {},
- sizeof(struct nvif_notify_uevent_req),
- sizeof(struct nvif_notify_uevent_rep),
- &wndw->notify);
- if (ret)
- return ret;
-
wndw->ntfy = NV50_DISP_OVLY_NTFY(wndw->id);
wndw->sema = NV50_DISP_OVLY_SEM0(wndw->id);
wndw->data = 0x00000000;
#include "atom.h"
#include "wndw.h"
-#include <nvif/clc37b.h>
+#include <nvif/if0014.h>
#include <nvif/pushc37b.h>
#include <nvhw/class/clc37b.h>
wimmc37b_init_(const struct nv50_wimm_func *func, struct nouveau_drm *drm,
s32 oclass, struct nv50_wndw *wndw)
{
- struct nvc37b_window_imm_channel_dma_v0 args = {
- .pushbuf = 0xb0007b00 | wndw->id,
- .index = wndw->id,
+ struct nvif_disp_chan_v0 args = {
+ .id = wndw->id,
};
struct nv50_disp *disp = nv50_disp(drm->dev);
int ret;
nv50_wndw_ctxdma_del(ctxdma);
}
- nvif_notify_dtor(&wndw->notify);
nv50_dmac_destroy(&wndw->wimm);
nv50_dmac_destroy(&wndw->wndw);
.format_mod_supported = nv50_plane_format_mod_supported,
};
-static int
-nv50_wndw_notify(struct nvif_notify *notify)
-{
- return NVIF_NOTIFY_KEEP;
-}
-
static const u64 nv50_cursor_format_modifiers[] = {
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID,
return ret;
}
- wndw->notify.func = nv50_wndw_notify;
-
if (wndw->func->blend_set) {
ret = drm_plane_create_zpos_property(&wndw->plane,
nv50_wndw_zpos_default(&wndw->plane), 0, 254);
#include "atom.h"
#include "lut.h"
-#include <nvif/notify.h>
-
struct nv50_wndw_ctxdma {
struct list_head head;
struct nvif_object object;
struct nv50_dmac wndw;
struct nv50_dmac wimm;
- struct nvif_notify notify;
u16 ntfy;
u16 sema;
u32 data;
#include <drm/drm_plane_helper.h>
#include <nouveau_bo.h>
-#include <nvif/clc37e.h>
+#include <nvif/if0014.h>
#include <nvif/pushc37b.h>
#include <nvhw/class/clc37e.h>
enum drm_plane_type type, int index, s32 oclass, u32 heads,
struct nv50_wndw **pwndw)
{
- struct nvc37e_window_channel_dma_v0 args = {
- .pushbuf = 0xb0007e00 | index,
- .index = index,
+ struct nvif_disp_chan_v0 args = {
+ .id = index,
};
struct nv50_disp *disp = nv50_disp(drm->dev);
struct nv50_wndw *wndw;
#include <drm/drm_plane_helper.h>
#include <nouveau_bo.h>
-#include <nvif/clc37e.h>
#include <nvif/pushc37b.h>
#include <nvhw/class/clc57e.h>
+++ /dev/null
-/* SPDX-License-Identifier: MIT */
-#ifndef __NVIF_CL507A_H__
-#define __NVIF_CL507A_H__
-
-struct nv50_disp_cursor_v0 {
- __u8 version;
- __u8 head;
- __u8 pad02[6];
-};
-
-#define NV50_DISP_CURSOR_V0_NTFY_UEVENT 0x00
-#endif
+++ /dev/null
-/* SPDX-License-Identifier: MIT */
-#ifndef __NVIF_CL507B_H__
-#define __NVIF_CL507B_H__
-
-struct nv50_disp_overlay_v0 {
- __u8 version;
- __u8 head;
- __u8 pad02[6];
-};
-
-#define NV50_DISP_OVERLAY_V0_NTFY_UEVENT 0x00
-#endif
+++ /dev/null
-/* SPDX-License-Identifier: MIT */
-#ifndef __NVIF_CL507C_H__
-#define __NVIF_CL507C_H__
-
-struct nv50_disp_base_channel_dma_v0 {
- __u8 version;
- __u8 head;
- __u8 pad02[6];
- __u64 pushbuf;
-};
-
-#define NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00
-#endif
+++ /dev/null
-/* SPDX-License-Identifier: MIT */
-#ifndef __NVIF_CL507D_H__
-#define __NVIF_CL507D_H__
-
-struct nv50_disp_core_channel_dma_v0 {
- __u8 version;
- __u8 pad01[7];
- __u64 pushbuf;
-};
-
-#define NV50_DISP_CORE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00
-#endif
+++ /dev/null
-/* SPDX-License-Identifier: MIT */
-#ifndef __NVIF_CL507E_H__
-#define __NVIF_CL507E_H__
-
-struct nv50_disp_overlay_channel_dma_v0 {
- __u8 version;
- __u8 head;
- __u8 pad02[6];
- __u64 pushbuf;
-};
-
-#define NV50_DISP_OVERLAY_CHANNEL_DMA_V0_NTFY_UEVENT 0x00
-#endif
#define NVIF_CLASS_VMM_GP100 /* ifc00d.h */ 0x8000c00d
#define NVIF_CLASS_DISP /* if0010.h */ 0x80000010
+#define NVIF_CLASS_DISP_CHAN /* if0014.h */ 0x80000014
/* the below match nvidia-assigned (either in hw, or sw) class numbers */
#define NV_NULL_CLASS 0x00000030
#define NV74_VP2 0x00007476
-#define NV50_DISP_CURSOR /* cl507a.h */ 0x0000507a
-#define G82_DISP_CURSOR /* cl507a.h */ 0x0000827a
-#define GT214_DISP_CURSOR /* cl507a.h */ 0x0000857a
-#define GF110_DISP_CURSOR /* cl507a.h */ 0x0000907a
-#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a
-#define GV100_DISP_CURSOR /* cl507a.h */ 0x0000c37a
-#define TU102_DISP_CURSOR /* cl507a.h */ 0x0000c57a
-#define GA102_DISP_CURSOR /* cl507a.h */ 0x0000c67a
-
-#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b
-#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b
-#define GT214_DISP_OVERLAY /* cl507b.h */ 0x0000857b
-#define GF110_DISP_OVERLAY /* cl507b.h */ 0x0000907b
-#define GK104_DISP_OVERLAY /* cl507b.h */ 0x0000917b
-
-#define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c37b
-#define TU102_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c57b
-#define GA102_DISP_WINDOW_IMM_CHANNEL_DMA /* clc37b.h */ 0x0000c67b
-
-#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c
-#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c
-#define GT200_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000837c
-#define GT214_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000857c
-#define GF110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000907c
-#define GK104_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000917c
-#define GK110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000927c
-
-#define NV50_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000507d
-#define G82_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000827d
-#define GT200_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000837d
-#define GT214_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000857d
-#define GT206_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000887d
-#define GF110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000907d
-#define GK104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000917d
-#define GK110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000927d
-#define GM107_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000947d
-#define GM200_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000957d
-#define GP100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000977d
-#define GP102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000987d
-#define GV100_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c37d
-#define TU102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c57d
-#define GA102_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000c67d
-
-#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e
-#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e
-#define GT200_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000837e
-#define GT214_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000857e
-#define GF110_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000907e
-#define GK104_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000917e
-
-#define GV100_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c37e
-#define TU102_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c57e
-#define GA102_DISP_WINDOW_CHANNEL_DMA /* clc37e.h */ 0x0000c67e
+#define NV50_DISP_CURSOR /* if0014.h */ 0x0000507a
+#define G82_DISP_CURSOR /* if0014.h */ 0x0000827a
+#define GT214_DISP_CURSOR /* if0014.h */ 0x0000857a
+#define GF110_DISP_CURSOR /* if0014.h */ 0x0000907a
+#define GK104_DISP_CURSOR /* if0014.h */ 0x0000917a
+#define GV100_DISP_CURSOR /* if0014.h */ 0x0000c37a
+#define TU102_DISP_CURSOR /* if0014.h */ 0x0000c57a
+#define GA102_DISP_CURSOR /* if0014.h */ 0x0000c67a
+
+#define NV50_DISP_OVERLAY /* if0014.h */ 0x0000507b
+#define G82_DISP_OVERLAY /* if0014.h */ 0x0000827b
+#define GT214_DISP_OVERLAY /* if0014.h */ 0x0000857b
+#define GF110_DISP_OVERLAY /* if0014.h */ 0x0000907b
+#define GK104_DISP_OVERLAY /* if0014.h */ 0x0000917b
+
+#define GV100_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c37b
+#define TU102_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c57b
+#define GA102_DISP_WINDOW_IMM_CHANNEL_DMA /* if0014.h */ 0x0000c67b
+
+#define NV50_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000507c
+#define G82_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000827c
+#define GT200_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000837c
+#define GT214_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000857c
+#define GF110_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000907c
+#define GK104_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000917c
+#define GK110_DISP_BASE_CHANNEL_DMA /* if0014.h */ 0x0000927c
+
+#define NV50_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000507d
+#define G82_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000827d
+#define GT200_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000837d
+#define GT214_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000857d
+#define GT206_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000887d
+#define GF110_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000907d
+#define GK104_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000917d
+#define GK110_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000927d
+#define GM107_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000947d
+#define GM200_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000957d
+#define GP100_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000977d
+#define GP102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000987d
+#define GV100_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c37d
+#define TU102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c57d
+#define GA102_DISP_CORE_CHANNEL_DMA /* if0014.h */ 0x0000c67d
+
+#define NV50_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000507e
+#define G82_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000827e
+#define GT200_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000837e
+#define GT214_DISP_OVERLAY_CHANNEL_DMA /* if0014.h */ 0x0000857e
+#define GF110_DISP_OVERLAY_CONTROL_DMA /* if0014.h */ 0x0000907e
+#define GK104_DISP_OVERLAY_CONTROL_DMA /* if0014.h */ 0x0000917e
+
+#define GV100_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c37e
+#define TU102_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c57e
+#define GA102_DISP_WINDOW_CHANNEL_DMA /* if0014.h */ 0x0000c67e
#define NV50_TESLA 0x00005097
#define G82_TESLA 0x00008297
+++ /dev/null
-/* SPDX-License-Identifier: MIT */
-#ifndef __NVIF_CLC37B_H__
-#define __NVIF_CLC37B_H__
-
-struct nvc37b_window_imm_channel_dma_v0 {
- __u8 version;
- __u8 index;
- __u8 pad02[6];
- __u64 pushbuf;
-};
-#endif
+++ /dev/null
-/* SPDX-License-Identifier: MIT */
-#ifndef __NVIF_CLC37E_H__
-#define __NVIF_CLC37E_H__
-
-struct nvc37e_window_channel_dma_v0 {
- __u8 version;
- __u8 index;
- __u8 pad02[6];
- __u64 pushbuf;
-};
-
-#define NVC37E_WINDOW_CHANNEL_DMA_V0_NTFY_UEVENT 0x00
-#endif
--- /dev/null
+/* SPDX-License-Identifier: MIT */
+#ifndef __NVIF_IF0014_H__
+#define __NVIF_IF0014_H__
+
+union nvif_disp_chan_args {
+ struct nvif_disp_chan_v0 {
+ __u8 version;
+ __u8 id;
+ __u8 pad02[6];
+ __u64 pushbuf;
+ } v0;
+};
+#endif
u32 pending;
} super;
+#define NVKM_DISP_EVENT_CHAN_AWAKEN BIT(0)
struct nvkm_event uevent;
struct {
#include <core/oproxy.h>
#include <core/ramht.h>
-#include <nvif/cl507d.h>
+#include <nvif/if0014.h>
static int
nvkm_disp_chan_rd32(struct nvkm_object *object, u64 addr, u32 *data)
struct nvkm_disp *disp = chan->disp;
switch (type) {
- case NV50_DISP_CORE_CHANNEL_DMA_V0_NTFY_UEVENT:
+ case 0:
*pevent = &disp->uevent;
return 0;
default:
struct nvkm_disp_chan *chan = nvkm_disp_chan(object);
struct nvkm_disp *disp = chan->disp;
- if (chan->chid.user >= 0)
+ spin_lock(&disp->client.lock);
+ if (disp->chan[chan->chid.user] == chan)
disp->chan[chan->chid.user] = NULL;
+ spin_unlock(&disp->client.lock);
nvkm_memory_unref(&chan->memory);
return chan;
.sclass = nvkm_disp_chan_child_get,
};
-int
-nvkm_disp_chan_new_(const struct nvkm_disp_chan_func *func,
- const struct nvkm_disp_chan_mthd *mthd,
- struct nvkm_disp *disp, int ctrl, int user, int head,
- const struct nvkm_oclass *oclass,
- struct nvkm_object **pobject)
+static int
+nvkm_disp_chan_new_(struct nvkm_disp *disp, int nr, const struct nvkm_oclass *oclass,
+ void *argv, u32 argc, struct nvkm_object **pobject)
{
+ const struct nvkm_disp_chan_user *user = NULL;
struct nvkm_disp_chan *chan;
+ union nvif_disp_chan_args *args = argv;
+ int ret, i;
+
+ for (i = 0; disp->func->user[i].ctor; i++) {
+ if (disp->func->user[i].base.oclass == oclass->base.oclass) {
+ user = disp->func->user[i].chan;
+ break;
+ }
+ }
+
+ if (WARN_ON(!user))
+ return -EINVAL;
+
+ if (argc != sizeof(args->v0) || args->v0.version != 0)
+ return -ENOSYS;
+ if (args->v0.id >= nr || !args->v0.pushbuf != !user->func->push)
+ return -EINVAL;
if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
return -ENOMEM;
*pobject = &chan->object;
nvkm_object_ctor(&nvkm_disp_chan, oclass, &chan->object);
- chan->func = func;
- chan->mthd = mthd;
+ chan->func = user->func;
+ chan->mthd = user->mthd;
chan->disp = disp;
- chan->chid.ctrl = ctrl;
- chan->chid.user = user;
- chan->head = head;
+ chan->chid.ctrl = user->ctrl + args->v0.id;
+ chan->chid.user = user->user + args->v0.id;
+ chan->head = args->v0.id;
+
+ if (chan->func->push) {
+ ret = chan->func->push(chan, args->v0.pushbuf);
+ if (ret)
+ return ret;
+ }
+ spin_lock(&disp->client.lock);
if (disp->chan[chan->chid.user]) {
- chan->chid.user = -1;
+ spin_unlock(&disp->client.lock);
return -EBUSY;
}
disp->chan[chan->chid.user] = chan;
+ spin_unlock(&disp->client.lock);
return 0;
}
+
+int
+nvkm_disp_wndw_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
+ struct nvkm_object **pobject)
+{
+ struct nvkm_disp *disp = nvkm_udisp(oclass->parent);
+
+ return nvkm_disp_chan_new_(disp, disp->wndw.nr, oclass, argv, argc, pobject);
+}
+
+int
+nvkm_disp_chan_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
+ struct nvkm_object **pobject)
+{
+ struct nvkm_disp *disp = nvkm_udisp(oclass->parent);
+
+ return nvkm_disp_chan_new_(disp, disp->head.nr, oclass, argv, argc, pobject);
+}
+
+int
+nvkm_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
+ struct nvkm_object **pobject)
+{
+ struct nvkm_disp *disp = nvkm_udisp(oclass->parent);
+
+ return nvkm_disp_chan_new_(disp, 1, oclass, argv, argc, pobject);
+}
u32 suspend_put;
};
+int nvkm_disp_core_new(const struct nvkm_oclass *, void *, u32, struct nvkm_object **);
+int nvkm_disp_chan_new(const struct nvkm_oclass *, void *, u32, struct nvkm_object **);
+int nvkm_disp_wndw_new(const struct nvkm_oclass *, void *, u32, struct nvkm_object **);
+
struct nvkm_disp_chan_func {
+ int (*push)(struct nvkm_disp_chan *, u64 object);
int (*init)(struct nvkm_disp_chan *);
void (*fini)(struct nvkm_disp_chan *);
void (*intr)(struct nvkm_disp_chan *, bool en);
int (*bind)(struct nvkm_disp_chan *, struct nvkm_object *, u32 handle);
};
-int nvkm_disp_chan_new_(const struct nvkm_disp_chan_func *,
- const struct nvkm_disp_chan_mthd *,
- struct nvkm_disp *, int ctrl, int user, int head,
- const struct nvkm_oclass *, struct nvkm_object **);
-int nv50_disp_dmac_new_(const struct nvkm_disp_chan_func *,
- const struct nvkm_disp_chan_mthd *,
- struct nvkm_disp *, int chid, int head, u64 push,
- const struct nvkm_oclass *, struct nvkm_object **);
-
void nv50_disp_chan_intr(struct nvkm_disp_chan *, bool);
u64 nv50_disp_chan_user(struct nvkm_disp_chan *, u64 *);
extern const struct nvkm_disp_chan_func nv50_disp_pioc_func;
extern const struct nvkm_disp_chan_func nv50_disp_dmac_func;
+int nv50_disp_dmac_push(struct nvkm_disp_chan *, u64);
int nv50_disp_dmac_bind(struct nvkm_disp_chan *, struct nvkm_object *, u32);
extern const struct nvkm_disp_chan_func nv50_disp_core_func;
void gv100_disp_dmac_fini(struct nvkm_disp_chan *);
int gv100_disp_dmac_bind(struct nvkm_disp_chan *, struct nvkm_object *, u32);
-int nv50_disp_curs_new_(const struct nvkm_disp_chan_func *,
- struct nvkm_disp *, int ctrl, int user,
- const struct nvkm_oclass *, void *argv, u32 argc,
- struct nvkm_object **);
-int nv50_disp_oimm_new_(const struct nvkm_disp_chan_func *,
- struct nvkm_disp *, int ctrl, int user,
- const struct nvkm_oclass *, void *argv, u32 argc,
- struct nvkm_object **);
-int nv50_disp_base_new_(const struct nvkm_disp_chan_func *,
- const struct nvkm_disp_chan_mthd *,
- struct nvkm_disp *, int chid,
- const struct nvkm_oclass *, void *argv, u32 argc,
- struct nvkm_object **);
-int nv50_disp_core_new_(const struct nvkm_disp_chan_func *,
- const struct nvkm_disp_chan_mthd *,
- struct nvkm_disp *, int chid,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **);
-int nv50_disp_ovly_new_(const struct nvkm_disp_chan_func *,
- const struct nvkm_disp_chan_mthd *,
- struct nvkm_disp *, int chid,
- const struct nvkm_oclass *, void *argv, u32 argc,
- struct nvkm_object **);
-
-int nv50_disp_curs_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int nv50_disp_oimm_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int nv50_disp_base_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int nv50_disp_core_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int nv50_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-
-int g84_disp_base_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int g84_disp_core_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int g84_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-
-int g94_disp_core_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-
-int gt200_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-
-int gf119_disp_curs_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gf119_disp_oimm_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gf119_disp_base_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gf119_disp_core_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gf119_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-
-int gk104_disp_core_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gk104_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-
-int gp102_disp_curs_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gp102_disp_oimm_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gp102_disp_base_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gp102_disp_core_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gp102_disp_ovly_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-
-int gv100_disp_curs_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gv100_disp_wimm_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gv100_disp_core_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
-int gv100_disp_wndw_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
+struct nvkm_disp_chan_user {
+ const struct nvkm_disp_chan_func *func;
+ int ctrl;
+ int user;
+ const struct nvkm_disp_chan_mthd *mthd;
+};
+
+extern const struct nvkm_disp_chan_user nv50_disp_oimm;
+extern const struct nvkm_disp_chan_user nv50_disp_curs;
+
+extern const struct nvkm_disp_chan_user g84_disp_core;
+extern const struct nvkm_disp_chan_user g84_disp_base;
+extern const struct nvkm_disp_chan_user g84_disp_ovly;
+
+extern const struct nvkm_disp_chan_user g94_disp_core;
+
+extern const struct nvkm_disp_chan_user gt200_disp_ovly;
+
+extern const struct nvkm_disp_chan_user gf119_disp_base;
+extern const struct nvkm_disp_chan_user gf119_disp_oimm;
+extern const struct nvkm_disp_chan_user gf119_disp_curs;
+
+extern const struct nvkm_disp_chan_user gk104_disp_core;
+extern const struct nvkm_disp_chan_user gk104_disp_ovly;
+
+extern const struct nvkm_disp_chan_user gv100_disp_core;
+extern const struct nvkm_disp_chan_user gv100_disp_curs;
+extern const struct nvkm_disp_chan_user gv100_disp_wndw;
+extern const struct nvkm_disp_chan_user gv100_disp_wimm;
struct nvkm_disp_mthd_list {
u32 mthd;
}
};
-int
-g84_disp_ovly_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_ovly_new_(&nv50_disp_dmac_func, &g84_disp_ovly_mthd,
- disp, 3, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+g84_disp_ovly = {
+ .func = &nv50_disp_dmac_func,
+ .ctrl = 3,
+ .user = 3,
+ .mthd = &g84_disp_ovly_mthd,
+};
static const struct nvkm_disp_mthd_list
g84_disp_base_mthd_base = {
}
};
-int
-g84_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_base_new_(&nv50_disp_dmac_func, &g84_disp_base_mthd,
- disp, 1, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+g84_disp_base = {
+ .func = &nv50_disp_dmac_func,
+ .ctrl = 1,
+ .user = 1,
+ .mthd = &g84_disp_base_mthd,
+};
const struct nvkm_disp_mthd_list
g84_disp_core_mthd_dac = {
}
};
-int
-g84_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_core_new_(&nv50_disp_core_func, &g84_disp_core_mthd,
- disp, 0, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+g84_disp_core = {
+ .func = &nv50_disp_core_func,
+ .ctrl = 0,
+ .user = 0,
+ .mthd = &g84_disp_core_mthd,
+};
static const struct nvkm_disp_func
g84_disp = {
.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
.root = { 0,0,G82_DISP },
.user = {
- {{0,0,G82_DISP_CURSOR }, nv50_disp_curs_new },
- {{0,0,G82_DISP_OVERLAY }, nv50_disp_oimm_new },
- {{0,0,G82_DISP_BASE_CHANNEL_DMA }, g84_disp_base_new },
- {{0,0,G82_DISP_CORE_CHANNEL_DMA }, g84_disp_core_new },
- {{0,0,G82_DISP_OVERLAY_CHANNEL_DMA}, g84_disp_ovly_new },
+ {{0,0,G82_DISP_CURSOR }, nvkm_disp_chan_new, &nv50_disp_curs },
+ {{0,0,G82_DISP_OVERLAY }, nvkm_disp_chan_new, &nv50_disp_oimm },
+ {{0,0,G82_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
+ {{0,0,G82_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g84_disp_core },
+ {{0,0,G82_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly },
{}
},
};
}
};
-int
-g94_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_core_new_(&nv50_disp_core_func, &g94_disp_core_mthd,
- disp, 0, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+g94_disp_core = {
+ .func = &nv50_disp_core_func,
+ .ctrl = 0,
+ .user = 0,
+ .mthd = &g94_disp_core_mthd,
+};
static const struct nvkm_disp_func
g94_disp = {
.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
.root = { 0,0,GT206_DISP },
.user = {
- {{0,0, G82_DISP_CURSOR }, nv50_disp_curs_new },
- {{0,0, G82_DISP_OVERLAY }, nv50_disp_oimm_new },
- {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, g84_disp_base_new },
- {{0,0,GT206_DISP_CORE_CHANNEL_DMA }, g94_disp_core_new },
- {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, gt200_disp_ovly_new },
+ {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },
+ {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },
+ {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
+ {{0,0,GT206_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core },
+ {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly },
{}
},
};
.root = { 0, 0,GA102_DISP },
.user = {
{{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new },
- {{ 0, 0,GA102_DISP_CURSOR }, gv100_disp_curs_new },
- {{ 0, 0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, gv100_disp_wimm_new },
- {{ 0, 0,GA102_DISP_CORE_CHANNEL_DMA }, gv100_disp_core_new },
- {{ 0, 0,GA102_DISP_WINDOW_CHANNEL_DMA }, gv100_disp_wndw_new },
+ {{ 0, 0,GA102_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs },
+ {{ 0, 0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm },
+ {{ 0, 0,GA102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core },
+ {{ 0, 0,GA102_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw },
{}
},
};
const struct nvkm_event_func
gf119_disp_chan_uevent = {
- .ctor = nv50_disp_chan_uevent_ctor,
.init = gf119_disp_chan_uevent_init,
.fini = gf119_disp_chan_uevent_fini,
};
const struct nvkm_disp_chan_func
gf119_disp_dmac_func = {
+ .push = nv50_disp_dmac_push,
.init = gf119_disp_dmac_init,
.fini = gf119_disp_dmac_fini,
.intr = gf119_disp_chan_intr,
.bind = gf119_disp_dmac_bind,
};
-int
-gf119_disp_curs_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_curs_new_(&gf119_disp_pioc_func, disp, 13, 13,
- oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gf119_disp_curs = {
+ .func = &gf119_disp_pioc_func,
+ .ctrl = 13,
+ .user = 13,
+};
-int
-gf119_disp_oimm_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_oimm_new_(&gf119_disp_pioc_func, disp, 9, 9,
- oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gf119_disp_oimm = {
+ .func = &gf119_disp_pioc_func,
+ .ctrl = 9,
+ .user = 9,
+};
static const struct nvkm_disp_mthd_list
gf119_disp_ovly_mthd_base = {
}
};
-int
-gf119_disp_ovly_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_ovly_new_(&gf119_disp_dmac_func, &gf119_disp_ovly_mthd,
- disp, 5, oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+gf119_disp_ovly = {
+ .func = &gf119_disp_dmac_func,
+ .ctrl = 5,
+ .user = 5,
+ .mthd = &gf119_disp_ovly_mthd,
+};
static const struct nvkm_disp_mthd_list
gf119_disp_base_mthd_base = {
}
};
-int
-gf119_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_base_new_(&gf119_disp_dmac_func, &gf119_disp_base_mthd,
- disp, 1, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gf119_disp_base = {
+ .func = &gf119_disp_dmac_func,
+ .ctrl = 1,
+ .user = 1,
+ .mthd = &gf119_disp_base_mthd,
+};
const struct nvkm_disp_mthd_list
gf119_disp_core_mthd_base = {
const struct nvkm_disp_chan_func
gf119_disp_core_func = {
+ .push = nv50_disp_dmac_push,
.init = gf119_disp_core_init,
.fini = gf119_disp_core_fini,
.intr = gf119_disp_chan_intr,
.bind = gf119_disp_dmac_bind,
};
-int
-gf119_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_core_new_(&gf119_disp_core_func, &gf119_disp_core_mthd,
- disp, 0, oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+gf119_disp_core = {
+ .func = &gf119_disp_core_func,
+ .ctrl = 0,
+ .user = 0,
+ .mthd = &gf119_disp_core_mthd,
+};
void
gf119_disp_super(struct work_struct *work)
.sor = { .cnt = gf119_sor_cnt, .new = gf119_sor_new },
.root = { 0,0,GF110_DISP },
.user = {
- {{0,0,GF110_DISP_CURSOR }, gf119_disp_curs_new },
- {{0,0,GF110_DISP_OVERLAY }, gf119_disp_oimm_new },
- {{0,0,GF110_DISP_BASE_CHANNEL_DMA }, gf119_disp_base_new },
- {{0,0,GF110_DISP_CORE_CHANNEL_DMA }, gf119_disp_core_new },
- {{0,0,GF110_DISP_OVERLAY_CONTROL_DMA}, gf119_disp_ovly_new },
+ {{0,0,GF110_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },
+ {{0,0,GF110_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },
+ {{0,0,GF110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },
+ {{0,0,GF110_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gf119_disp_core },
+ {{0,0,GF110_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gf119_disp_ovly },
{}
},
};
}
};
-int
-gk104_disp_ovly_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_ovly_new_(&gf119_disp_dmac_func, &gk104_disp_ovly_mthd,
- disp, 5, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gk104_disp_ovly = {
+ .func = &gf119_disp_dmac_func,
+ .ctrl = 5,
+ .user = 5,
+ .mthd = &gk104_disp_ovly_mthd,
+};
static const struct nvkm_disp_mthd_list
gk104_disp_core_mthd_head = {
}
};
-int
-gk104_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_core_new_(&gf119_disp_core_func, &gk104_disp_core_mthd,
- disp, 0, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gk104_disp_core = {
+ .func = &gf119_disp_core_func,
+ .ctrl = 0,
+ .user = 0,
+ .mthd = &gk104_disp_core_mthd,
+};
static const struct nvkm_disp_func
gk104_disp = {
.sor = { .cnt = gf119_sor_cnt, .new = gk104_sor_new },
.root = { 0,0,GK104_DISP },
.user = {
- {{0,0,GK104_DISP_CURSOR }, gf119_disp_curs_new },
- {{0,0,GK104_DISP_OVERLAY }, gf119_disp_oimm_new },
- {{0,0,GK104_DISP_BASE_CHANNEL_DMA }, gf119_disp_base_new },
- {{0,0,GK104_DISP_CORE_CHANNEL_DMA }, gk104_disp_core_new },
- {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
+ {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },
+ {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },
+ {{0,0,GK104_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },
+ {{0,0,GK104_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core },
+ {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },
{}
},
};
.sor = { .cnt = gf119_sor_cnt, .new = gk104_sor_new },
.root = { 0,0,GK110_DISP },
.user = {
- {{0,0,GK104_DISP_CURSOR }, gf119_disp_curs_new },
- {{0,0,GK104_DISP_OVERLAY }, gf119_disp_oimm_new },
- {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, gf119_disp_base_new },
- {{0,0,GK110_DISP_CORE_CHANNEL_DMA }, gk104_disp_core_new },
- {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
+ {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },
+ {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },
+ {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },
+ {{0,0,GK110_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core },
+ {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },
{}
},
};
.sor = { .cnt = gf119_sor_cnt, .new = gm107_sor_new },
.root = { 0,0,GM107_DISP },
.user = {
- {{0,0,GK104_DISP_CURSOR }, gf119_disp_curs_new },
- {{0,0,GK104_DISP_OVERLAY }, gf119_disp_oimm_new },
- {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, gf119_disp_base_new },
- {{0,0,GM107_DISP_CORE_CHANNEL_DMA }, gk104_disp_core_new },
- {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
+ {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },
+ {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },
+ {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },
+ {{0,0,GM107_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core },
+ {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },
{}
},
};
.sor = { .cnt = gf119_sor_cnt, .new = gm200_sor_new },
.root = { 0,0,GM200_DISP },
.user = {
- {{0,0,GK104_DISP_CURSOR }, gf119_disp_curs_new },
- {{0,0,GK104_DISP_OVERLAY }, gf119_disp_oimm_new },
- {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, gf119_disp_base_new },
- {{0,0,GM200_DISP_CORE_CHANNEL_DMA }, gk104_disp_core_new },
- {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
+ {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },
+ {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },
+ {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },
+ {{0,0,GM200_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core },
+ {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },
{}
},
};
.sor = { .cnt = gf119_sor_cnt, .new = gp100_sor_new },
.root = { 0,0,GP100_DISP },
.user = {
- {{0,0,GK104_DISP_CURSOR }, gf119_disp_curs_new },
- {{0,0,GK104_DISP_OVERLAY }, gf119_disp_oimm_new },
- {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, gf119_disp_base_new },
- {{0,0,GP100_DISP_CORE_CHANNEL_DMA }, gk104_disp_core_new },
- {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gk104_disp_ovly_new },
+ {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs },
+ {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm },
+ {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base },
+ {{0,0,GP100_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core },
+ {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly },
{}
},
};
const struct nvkm_disp_chan_func
gp102_disp_dmac_func = {
+ .push = nv50_disp_dmac_push,
.init = gp102_disp_dmac_init,
.fini = gf119_disp_dmac_fini,
.intr = gf119_disp_chan_intr,
.bind = gf119_disp_dmac_bind,
};
-int
-gp102_disp_curs_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_curs_new_(&gf119_disp_pioc_func, disp, 13, 17,
- oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+gp102_disp_curs = {
+ .func = &gf119_disp_pioc_func,
+ .ctrl = 13,
+ .user = 17,
+};
-int
-gp102_disp_oimm_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_oimm_new_(&gf119_disp_pioc_func, disp, 9, 13,
- oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+gp102_disp_oimm = {
+ .func = &gf119_disp_pioc_func,
+ .ctrl = 9,
+ .user = 13,
+};
-int
-gp102_disp_ovly_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_ovly_new_(&gp102_disp_dmac_func, &gk104_disp_ovly_mthd,
- disp, 5, oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+gp102_disp_ovly = {
+ .func = &gp102_disp_dmac_func,
+ .ctrl = 5,
+ .user = 5,
+ .mthd = &gk104_disp_ovly_mthd,
+};
-int
-gp102_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_base_new_(&gp102_disp_dmac_func, &gf119_disp_base_mthd,
- disp, 1, oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+gp102_disp_base = {
+ .func = &gp102_disp_dmac_func,
+ .ctrl = 1,
+ .user = 1,
+ .mthd = &gf119_disp_base_mthd,
+};
static int
gp102_disp_core_init(struct nvkm_disp_chan *chan)
static const struct nvkm_disp_chan_func
gp102_disp_core_func = {
+ .push = nv50_disp_dmac_push,
.init = gp102_disp_core_init,
.fini = gf119_disp_core_fini,
.intr = gf119_disp_chan_intr,
.bind = gf119_disp_dmac_bind,
};
-int
-gp102_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_core_new_(&gp102_disp_core_func, &gk104_disp_core_mthd,
- disp, 0, oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+gp102_disp_core = {
+ .func = &gp102_disp_core_func,
+ .ctrl = 0,
+ .user = 0,
+ .mthd = &gk104_disp_core_mthd,
+};
static void
gp102_disp_intr_error(struct nvkm_disp *disp, int chid)
.sor = { .cnt = gf119_sor_cnt, .new = gp100_sor_new },
.root = { 0,0,GP102_DISP },
.user = {
- {{0,0,GK104_DISP_CURSOR }, gp102_disp_curs_new },
- {{0,0,GK104_DISP_OVERLAY }, gp102_disp_oimm_new },
- {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, gp102_disp_base_new },
- {{0,0,GP102_DISP_CORE_CHANNEL_DMA }, gp102_disp_core_new },
- {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, gp102_disp_ovly_new },
+ {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gp102_disp_curs },
+ {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gp102_disp_oimm },
+ {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gp102_disp_base },
+ {{0,0,GP102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gp102_disp_core },
+ {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gp102_disp_ovly },
{}
},
};
}
};
-int
-gt200_disp_ovly_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_ovly_new_(&nv50_disp_dmac_func, >200_disp_ovly_mthd,
- disp, 3, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gt200_disp_ovly = {
+ .func = &nv50_disp_dmac_func,
+ .ctrl = 3,
+ .user = 3,
+ .mthd = >200_disp_ovly_mthd,
+};
static const struct nvkm_disp_func
gt200_disp = {
.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
.root = { 0,0,GT200_DISP },
.user = {
- {{0,0, G82_DISP_CURSOR }, nv50_disp_curs_new },
- {{0,0, G82_DISP_OVERLAY }, nv50_disp_oimm_new },
- {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, g84_disp_base_new },
- {{0,0,GT200_DISP_CORE_CHANNEL_DMA }, g84_disp_core_new },
- {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, gt200_disp_ovly_new },
+ {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },
+ {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },
+ {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
+ {{0,0,GT200_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g84_disp_core },
+ {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly },
{}
},
};
.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
.root = { 0,0,GT214_DISP },
.user = {
- {{0,0,GT214_DISP_CURSOR }, nv50_disp_curs_new },
- {{0,0,GT214_DISP_OVERLAY }, nv50_disp_oimm_new },
- {{0,0,GT214_DISP_BASE_CHANNEL_DMA }, g84_disp_base_new },
- {{0,0,GT214_DISP_CORE_CHANNEL_DMA }, g94_disp_core_new },
- {{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, g84_disp_ovly_new },
+ {{0,0,GT214_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },
+ {{0,0,GT214_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },
+ {{0,0,GT214_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
+ {{0,0,GT214_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core },
+ {{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly },
{}
},
};
#include <subdev/timer.h>
#include <nvif/class.h>
-#include <nvif/clc37b.h>
-#include <nvif/clc37e.h>
#include <nvif/unpack.h>
static void
const struct nvkm_event_func
gv100_disp_chan_uevent = {
- .ctor = nv50_disp_chan_uevent_ctor,
};
u64
}
static const struct nvkm_disp_chan_func
-gv100_disp_wimm = {
+gv100_disp_wimm_func = {
+ .push = nv50_disp_dmac_push,
.init = gv100_disp_dmac_init,
.fini = gv100_disp_dmac_fini,
.intr = gv100_disp_wimm_intr,
.user = gv100_disp_chan_user,
};
-static int
-gv100_disp_wimm_new_(const struct nvkm_disp_chan_func *func,
- const struct nvkm_disp_chan_mthd *mthd,
- struct nvkm_disp *disp, int chid,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- union {
- struct nvc37b_window_imm_channel_dma_v0 v0;
- } *args = argv;
- struct nvkm_object *parent = oclass->parent;
- int wndw, ret = -ENOSYS;
- u64 push;
-
- nvif_ioctl(parent, "create window imm channel dma size %d\n", argc);
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- nvif_ioctl(parent, "create window imm channel dma vers %d "
- "pushbuf %016llx index %d\n",
- args->v0.version, args->v0.pushbuf, args->v0.index);
- if (!(disp->wndw.mask & BIT(args->v0.index)))
- return -EINVAL;
- push = args->v0.pushbuf;
- wndw = args->v0.index;
- } else
- return ret;
-
- return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw,
- wndw, push, oclass, pobject);
-}
-
-int
-gv100_disp_wimm_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return gv100_disp_wimm_new_(&gv100_disp_wimm, NULL, disp, 33,
- oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gv100_disp_wimm = {
+ .func = &gv100_disp_wimm_func,
+ .ctrl = 33,
+ .user = 33,
+};
static const struct nvkm_disp_mthd_list
gv100_disp_wndw_mthd_base = {
}
static const struct nvkm_disp_chan_func
-gv100_disp_wndw = {
+gv100_disp_wndw_func = {
+ .push = nv50_disp_dmac_push,
.init = gv100_disp_dmac_init,
.fini = gv100_disp_dmac_fini,
.intr = gv100_disp_wndw_intr,
.bind = gv100_disp_dmac_bind,
};
-static int
-gv100_disp_wndw_new_(const struct nvkm_disp_chan_func *func,
- const struct nvkm_disp_chan_mthd *mthd,
- struct nvkm_disp *disp, int chid,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- union {
- struct nvc37e_window_channel_dma_v0 v0;
- } *args = argv;
- struct nvkm_object *parent = oclass->parent;
- int wndw, ret = -ENOSYS;
- u64 push;
-
- nvif_ioctl(parent, "create window channel dma size %d\n", argc);
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- nvif_ioctl(parent, "create window channel dma vers %d "
- "pushbuf %016llx index %d\n",
- args->v0.version, args->v0.pushbuf, args->v0.index);
- if (!(disp->wndw.mask & BIT(args->v0.index)))
- return -EINVAL;
- push = args->v0.pushbuf;
- wndw = args->v0.index;
- } else
- return ret;
-
- return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw,
- wndw, push, oclass, pobject);
-}
-
-int
-gv100_disp_wndw_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return gv100_disp_wndw_new_(&gv100_disp_wndw, &gv100_disp_wndw_mthd,
- disp, 1, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gv100_disp_wndw = {
+ .func = &gv100_disp_wndw_func,
+ .ctrl = 1,
+ .user = 1,
+ .mthd = &gv100_disp_wndw_mthd,
+};
int
gv100_disp_wndw_cnt(struct nvkm_disp *disp, unsigned long *pmask)
}
static const struct nvkm_disp_chan_func
-gv100_disp_curs = {
+gv100_disp_curs_func = {
.init = gv100_disp_curs_init,
.fini = gv100_disp_curs_fini,
.intr = gv100_disp_curs_intr,
.user = gv100_disp_chan_user,
};
-int
-gv100_disp_curs_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_curs_new_(&gv100_disp_curs, disp, 73, 73,
- oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gv100_disp_curs = {
+ .func = &gv100_disp_curs_func,
+ .ctrl = 73,
+ .user = 73,
+};
const struct nvkm_disp_mthd_list
gv100_disp_core_mthd_base = {
}
static const struct nvkm_disp_chan_func
-gv100_disp_core = {
+gv100_disp_core_func = {
+ .push = nv50_disp_dmac_push,
.init = gv100_disp_core_init,
.fini = gv100_disp_core_fini,
.intr = gv100_disp_core_intr,
.bind = gv100_disp_dmac_bind,
};
-int
-gv100_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_core_new_(&gv100_disp_core, &gv100_disp_core_mthd,
- disp, 0, oclass, argv, argc, pobject);
-}
+const struct nvkm_disp_chan_user
+gv100_disp_core = {
+ .func = &gv100_disp_core_func,
+ .ctrl = 0,
+ .user = 0,
+ .mthd = &gv100_disp_core_mthd,
+};
#define gv100_disp_caps(p) container_of((p), struct gv100_disp_caps, object)
int
gv100_disp_caps_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
+ struct nvkm_object **pobject)
{
+ struct nvkm_disp *disp = nvkm_udisp(oclass->parent);
struct gv100_disp_caps *caps;
if (!(caps = kzalloc(sizeof(*caps), GFP_KERNEL)))
.root = { 0, 0,GV100_DISP },
.user = {
{{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new },
- {{ 0, 0,GV100_DISP_CURSOR }, gv100_disp_curs_new },
- {{ 0, 0,GV100_DISP_WINDOW_IMM_CHANNEL_DMA}, gv100_disp_wimm_new },
- {{ 0, 0,GV100_DISP_CORE_CHANNEL_DMA }, gv100_disp_core_new },
- {{ 0, 0,GV100_DISP_WINDOW_CHANNEL_DMA }, gv100_disp_wndw_new },
+ {{ 0, 0,GV100_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs },
+ {{ 0, 0,GV100_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm },
+ {{ 0, 0,GV100_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core },
+ {{ 0, 0,GV100_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw },
{}
},
};
.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
.root = { 0,0,GT206_DISP },
.user = {
- {{0,0, G82_DISP_CURSOR }, nv50_disp_curs_new },
- {{0,0, G82_DISP_OVERLAY }, nv50_disp_oimm_new },
- {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, g84_disp_base_new },
- {{0,0,GT206_DISP_CORE_CHANNEL_DMA }, g94_disp_core_new },
- {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, gt200_disp_ovly_new },
+ {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs },
+ {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm },
+ {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
+ {{0,0,GT206_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core },
+ {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly },
{}
},
};
.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
.root = { 0,0,GT214_DISP },
.user = {
- {{0,0,GT214_DISP_CURSOR }, nv50_disp_curs_new },
- {{0,0,GT214_DISP_OVERLAY }, nv50_disp_oimm_new },
- {{0,0,GT214_DISP_BASE_CHANNEL_DMA }, g84_disp_base_new },
- {{0,0,GT214_DISP_CORE_CHANNEL_DMA }, g94_disp_core_new },
- {{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, g84_disp_ovly_new },
+ {{0,0,GT214_DISP_CURSOR }, nvkm_disp_chan_new, &nv50_disp_curs },
+ {{0,0,GT214_DISP_OVERLAY }, nvkm_disp_chan_new, &nv50_disp_oimm },
+ {{0,0,GT214_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base },
+ {{0,0,GT214_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core },
+ {{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly },
{}
},
};
#include <subdev/timer.h>
#include <nvif/class.h>
-#include <nvif/cl507a.h>
-#include <nvif/cl507b.h>
-#include <nvif/cl507c.h>
-#include <nvif/cl507d.h>
-#include <nvif/cl507e.h>
-#include <nvif/event.h>
#include <nvif/unpack.h>
static void
void
nv50_disp_chan_uevent_send(struct nvkm_disp *disp, int chid)
{
- struct nvif_notify_uevent_rep {
- } rep;
-
- nvkm_event_send(&disp->uevent, 1, chid, &rep, sizeof(rep));
-}
-
-int
-nv50_disp_chan_uevent_ctor(struct nvkm_object *object, void *data, u32 size,
- struct nvkm_notify *notify)
-{
- struct nvkm_disp_chan *chan = nvkm_disp_chan(object);
- union {
- struct nvif_notify_uevent_req none;
- } *args = data;
- int ret = -ENOSYS;
-
- if (!(ret = nvif_unvers(ret, &data, &size, args->none))) {
- notify->size = sizeof(struct nvif_notify_uevent_rep);
- notify->types = 1;
- notify->index = chan->chid.user;
- return 0;
- }
-
- return ret;
+ nvkm_event_send(&disp->uevent, NVKM_DISP_EVENT_CHAN_AWAKEN, chid, NULL, 0);
}
const struct nvkm_event_func
nv50_disp_chan_uevent = {
- .ctor = nv50_disp_chan_uevent_ctor,
.init = nv50_disp_chan_uevent_init,
.fini = nv50_disp_chan_uevent_fini,
};
}
int
-nv50_disp_dmac_new_(const struct nvkm_disp_chan_func *func,
- const struct nvkm_disp_chan_mthd *mthd,
- struct nvkm_disp *disp, int chid, int head, u64 push,
- const struct nvkm_oclass *oclass,
- struct nvkm_object **pobject)
+nv50_disp_dmac_push(struct nvkm_disp_chan *chan, u64 object)
{
- struct nvkm_client *client = oclass->client;
- struct nvkm_disp_chan *chan;
- int ret;
-
- ret = nvkm_disp_chan_new_(func, mthd, disp, chid, chid, head, oclass,
- pobject);
- chan = nvkm_disp_chan(*pobject);
- if (ret)
- return ret;
-
- chan->memory = nvkm_umem_search(client, push);
+ chan->memory = nvkm_umem_search(chan->object.client, object);
if (IS_ERR(chan->memory))
return PTR_ERR(chan->memory);
const struct nvkm_disp_chan_func
nv50_disp_dmac_func = {
+ .push = nv50_disp_dmac_push,
.init = nv50_disp_dmac_init,
.fini = nv50_disp_dmac_fini,
.intr = nv50_disp_chan_intr,
.bind = nv50_disp_dmac_bind,
};
-int
-nv50_disp_curs_new_(const struct nvkm_disp_chan_func *func,
- struct nvkm_disp *disp, int ctrl, int user,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- union {
- struct nv50_disp_cursor_v0 v0;
- } *args = argv;
- struct nvkm_object *parent = oclass->parent;
- int head, ret = -ENOSYS;
-
- nvif_ioctl(parent, "create disp cursor size %d\n", argc);
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- nvif_ioctl(parent, "create disp cursor vers %d head %d\n",
- args->v0.version, args->v0.head);
- if (!nvkm_head_find(disp, args->v0.head))
- return -EINVAL;
- head = args->v0.head;
- } else
- return ret;
-
- return nvkm_disp_chan_new_(func, NULL, disp, ctrl + head, user + head,
- head, oclass, pobject);
-}
-
-int
-nv50_disp_curs_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_curs_new_(&nv50_disp_pioc_func, disp, 7, 7,
- oclass, argv, argc, pobject);
-}
-
-int
-nv50_disp_oimm_new_(const struct nvkm_disp_chan_func *func,
- struct nvkm_disp *disp, int ctrl, int user,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- union {
- struct nv50_disp_overlay_v0 v0;
- } *args = argv;
- struct nvkm_object *parent = oclass->parent;
- int head, ret = -ENOSYS;
-
- nvif_ioctl(parent, "create disp overlay size %d\n", argc);
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- nvif_ioctl(parent, "create disp overlay vers %d head %d\n",
- args->v0.version, args->v0.head);
- if (!nvkm_head_find(disp, args->v0.head))
- return -EINVAL;
- head = args->v0.head;
- } else
- return ret;
-
- return nvkm_disp_chan_new_(func, NULL, disp, ctrl + head, user + head,
- head, oclass, pobject);
-}
-
-int
-nv50_disp_oimm_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_oimm_new_(&nv50_disp_pioc_func, disp, 5, 5,
- oclass, argv, argc, pobject);
-}
-
-int
-nv50_disp_ovly_new_(const struct nvkm_disp_chan_func *func,
- const struct nvkm_disp_chan_mthd *mthd,
- struct nvkm_disp *disp, int chid,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- union {
- struct nv50_disp_overlay_channel_dma_v0 v0;
- } *args = argv;
- struct nvkm_object *parent = oclass->parent;
- int head, ret = -ENOSYS;
- u64 push;
-
- nvif_ioctl(parent, "create disp overlay channel dma size %d\n", argc);
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- nvif_ioctl(parent, "create disp overlay channel dma vers %d "
- "pushbuf %016llx head %d\n",
- args->v0.version, args->v0.pushbuf, args->v0.head);
- if (!nvkm_head_find(disp, args->v0.head))
- return -EINVAL;
- push = args->v0.pushbuf;
- head = args->v0.head;
- } else
- return ret;
+const struct nvkm_disp_chan_user
+nv50_disp_curs = {
+ .func = &nv50_disp_pioc_func,
+ .ctrl = 7,
+ .user = 7,
+};
- return nv50_disp_dmac_new_(func, mthd, disp, chid + head,
- head, push, oclass, pobject);
-}
+const struct nvkm_disp_chan_user
+nv50_disp_oimm = {
+ .func = &nv50_disp_pioc_func,
+ .ctrl = 5,
+ .user = 5,
+};
static const struct nvkm_disp_mthd_list
nv50_disp_ovly_mthd_base = {
}
};
-int
-nv50_disp_ovly_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_ovly_new_(&nv50_disp_dmac_func, &nv50_disp_ovly_mthd,
- disp, 3, oclass, argv, argc, pobject);
-}
-
-int
-nv50_disp_base_new_(const struct nvkm_disp_chan_func *func,
- const struct nvkm_disp_chan_mthd *mthd,
- struct nvkm_disp *disp, int chid,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- union {
- struct nv50_disp_base_channel_dma_v0 v0;
- } *args = argv;
- struct nvkm_object *parent = oclass->parent;
- int head, ret = -ENOSYS;
- u64 push;
-
- nvif_ioctl(parent, "create disp base channel dma size %d\n", argc);
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- nvif_ioctl(parent, "create disp base channel dma vers %d "
- "pushbuf %016llx head %d\n",
- args->v0.version, args->v0.pushbuf, args->v0.head);
- if (!nvkm_head_find(disp, args->v0.head))
- return -EINVAL;
- push = args->v0.pushbuf;
- head = args->v0.head;
- } else
- return ret;
-
- return nv50_disp_dmac_new_(func, mthd, disp, chid + head,
- head, push, oclass, pobject);
-}
+static const struct nvkm_disp_chan_user
+nv50_disp_ovly = {
+ .func = &nv50_disp_dmac_func,
+ .ctrl = 3,
+ .user = 3,
+ .mthd = &nv50_disp_ovly_mthd,
+};
static const struct nvkm_disp_mthd_list
nv50_disp_base_mthd_base = {
}
};
-int
-nv50_disp_base_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_base_new_(&nv50_disp_dmac_func, &nv50_disp_base_mthd,
- disp, 1, oclass, argv, argc, pobject);
-}
-
-int
-nv50_disp_core_new_(const struct nvkm_disp_chan_func *func,
- const struct nvkm_disp_chan_mthd *mthd,
- struct nvkm_disp *disp, int chid,
- const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- union {
- struct nv50_disp_core_channel_dma_v0 v0;
- } *args = argv;
- struct nvkm_object *parent = oclass->parent;
- u64 push;
- int ret = -ENOSYS;
-
- nvif_ioctl(parent, "create disp core channel dma size %d\n", argc);
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- nvif_ioctl(parent, "create disp core channel dma vers %d "
- "pushbuf %016llx\n",
- args->v0.version, args->v0.pushbuf);
- push = args->v0.pushbuf;
- } else
- return ret;
-
- return nv50_disp_dmac_new_(func, mthd, disp, chid, 0,
- push, oclass, pobject);
-}
+static const struct nvkm_disp_chan_user
+nv50_disp_base = {
+ .func = &nv50_disp_dmac_func,
+ .ctrl = 1,
+ .user = 1,
+ .mthd = &nv50_disp_base_mthd,
+};
const struct nvkm_disp_mthd_list
nv50_disp_core_mthd_base = {
const struct nvkm_disp_chan_func
nv50_disp_core_func = {
+ .push = nv50_disp_dmac_push,
.init = nv50_disp_core_init,
.fini = nv50_disp_core_fini,
.intr = nv50_disp_chan_intr,
.bind = nv50_disp_dmac_bind,
};
-int
-nv50_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_disp *disp, struct nvkm_object **pobject)
-{
- return nv50_disp_core_new_(&nv50_disp_core_func, &nv50_disp_core_mthd,
- disp, 0, oclass, argv, argc, pobject);
-}
+static const struct nvkm_disp_chan_user
+nv50_disp_core = {
+ .func = &nv50_disp_core_func,
+ .ctrl = 0,
+ .user = 0,
+ .mthd = &nv50_disp_core_mthd,
+};
static u32
nv50_disp_super_iedt(struct nvkm_head *head, struct nvkm_outp *outp,
.pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new },
.root = { 0, 0, NV50_DISP },
.user = {
- {{0,0,NV50_DISP_CURSOR }, nv50_disp_curs_new },
- {{0,0,NV50_DISP_OVERLAY }, nv50_disp_oimm_new },
- {{0,0,NV50_DISP_BASE_CHANNEL_DMA }, nv50_disp_base_new },
- {{0,0,NV50_DISP_CORE_CHANNEL_DMA }, nv50_disp_core_new },
- {{0,0,NV50_DISP_OVERLAY_CHANNEL_DMA}, nv50_disp_ovly_new },
+ {{0,0,NV50_DISP_CURSOR }, nvkm_disp_chan_new, &nv50_disp_curs },
+ {{0,0,NV50_DISP_OVERLAY }, nvkm_disp_chan_new, &nv50_disp_oimm },
+ {{0,0,NV50_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &nv50_disp_base },
+ {{0,0,NV50_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &nv50_disp_core },
+ {{0,0,NV50_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, &nv50_disp_ovly },
{}
}
};
struct nvkm_disp_user {
struct nvkm_sclass base;
- int (*ctor)(const struct nvkm_oclass *, void *argv, u32 argc, struct nvkm_disp *,
+ int (*ctor)(const struct nvkm_oclass *, void *argv, u32 argc,
struct nvkm_object **);
+ const struct nvkm_disp_chan_user *chan;
} user[];
};
void gv100_disp_intr(struct nvkm_disp *);
void gv100_disp_super(struct work_struct *);
int gv100_disp_wndw_cnt(struct nvkm_disp *, unsigned long *);
-int gv100_disp_caps_new(const struct nvkm_oclass *, void *, u32,
- struct nvkm_disp *, struct nvkm_object **);
+int gv100_disp_caps_new(const struct nvkm_oclass *, void *, u32, struct nvkm_object **);
int tu102_disp_init(struct nvkm_disp *);
void nv50_disp_update_sppll1(struct nvkm_disp *);
extern const struct nvkm_event_func nv50_disp_chan_uevent;
-int nv50_disp_chan_uevent_ctor(struct nvkm_object *, void *, u32,
- struct nvkm_notify *);
void nv50_disp_chan_uevent_send(struct nvkm_disp *, int);
extern const struct nvkm_event_func gf119_disp_chan_uevent;
.root = { 0, 0,TU102_DISP },
.user = {
{{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new },
- {{ 0, 0,TU102_DISP_CURSOR }, gv100_disp_curs_new },
- {{ 0, 0,TU102_DISP_WINDOW_IMM_CHANNEL_DMA}, gv100_disp_wimm_new },
- {{ 0, 0,TU102_DISP_CORE_CHANNEL_DMA }, gv100_disp_core_new },
- {{ 0, 0,TU102_DISP_WINDOW_CHANNEL_DMA }, gv100_disp_wndw_new },
+ {{ 0, 0,TU102_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs },
+ {{ 0, 0,TU102_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm },
+ {{ 0, 0,TU102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core },
+ {{ 0, 0,TU102_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw },
{}
},
};
#include <nvif/if0010.h>
-static int
-nvkm_udisp_sclass_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
- struct nvkm_object **pobject)
-{
- struct nvkm_disp *disp = nvkm_udisp(oclass->parent);
- const struct nvkm_disp_user *user = oclass->priv;
-
- return user->ctor(oclass, argv, argc, disp, pobject);
-}
-
static int
nvkm_udisp_sclass(struct nvkm_object *object, int index, struct nvkm_oclass *sclass)
{
if (disp->func->user[index].ctor) {
sclass->base = disp->func->user[index].base;
- sclass->priv = disp->func->user + index;
- sclass->ctor = nvkm_udisp_sclass_new;
+ sclass->ctor = disp->func->user[index].ctor;
return 0;
}
projects / linux-2.6-microblaze.git / commitdiff