drm/i915: eliminate remaining uses of intel_device_info->gen

Replace gen with the new graphics_ver value and use GRAPHICS_VER()
in those places.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210413051002.92589-10-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 5964e67..2971435 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -274,7 +274,7 @@ struct i915_execbuffer {
                struct drm_mm_node node; /** temporary GTT binding */
                unsigned long vaddr; /** Current kmap address */
                unsigned long page; /** Currently mapped page index */
-               unsigned int gen; /** Cached value of INTEL_GEN */
+               unsigned int graphics_ver; /** Cached value of GRAPHICS_VER */
                bool use_64bit_reloc : 1;
                bool has_llc : 1;
                bool has_fence : 1;
@@ -1049,10 +1049,10 @@ static void reloc_cache_init(struct reloc_cache *cache,
        cache->page = -1;
        cache->vaddr = 0;
        /* Must be a variable in the struct to allow GCC to unroll. */
-       cache->gen = INTEL_GEN(i915);
+       cache->graphics_ver = GRAPHICS_VER(i915);
        cache->has_llc = HAS_LLC(i915);
        cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
-       cache->has_fence = cache->gen < 4;
+       cache->has_fence = cache->graphics_ver < 4;
        cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
        cache->node.flags = 0;
        reloc_cache_clear(cache);
@@ -1402,7 +1402,7 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
 
        err = eb->engine->emit_bb_start(rq,
                                        batch->node.start, PAGE_SIZE,
-                                       cache->gen > 5 ? 0 : I915_DISPATCH_SECURE);
+                                       cache->graphics_ver > 5 ? 0 : I915_DISPATCH_SECURE);
        if (err)
                goto skip_request;
 
@@ -1503,14 +1503,14 @@ static int __reloc_entry_gpu(struct i915_execbuffer *eb,
                              u64 offset,
                              u64 target_addr)
 {
-       const unsigned int gen = eb->reloc_cache.gen;
+       const unsigned int ver = eb->reloc_cache.graphics_ver;
        unsigned int len;
        u32 *batch;
        u64 addr;
 
-       if (gen >= 8)
+       if (ver >= 8)
                len = offset & 7 ? 8 : 5;
-       else if (gen >= 4)
+       else if (ver >= 4)
                len = 4;
        else
                len = 3;
@@ -1522,7 +1522,7 @@ static int __reloc_entry_gpu(struct i915_execbuffer *eb,
                return false;
 
        addr = gen8_canonical_addr(vma->node.start + offset);
-       if (gen >= 8) {
+       if (ver >= 8) {
                if (offset & 7) {
                        *batch++ = MI_STORE_DWORD_IMM_GEN4;
                        *batch++ = lower_32_bits(addr);
@@ -1542,7 +1542,7 @@ static int __reloc_entry_gpu(struct i915_execbuffer *eb,
                        *batch++ = lower_32_bits(target_addr);
                        *batch++ = upper_32_bits(target_addr);
                }
-       } else if (gen >= 6) {
+       } else if (ver >= 6) {
                *batch++ = MI_STORE_DWORD_IMM_GEN4;
                *batch++ = 0;
                *batch++ = addr;
@@ -1552,12 +1552,12 @@ static int __reloc_entry_gpu(struct i915_execbuffer *eb,
                *batch++ = 0;
                *batch++ = vma_phys_addr(vma, offset);
                *batch++ = target_addr;
-       } else if (gen >= 4) {
+       } else if (ver >= 4) {
                *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
                *batch++ = 0;
                *batch++ = addr;
                *batch++ = target_addr;
-       } else if (gen >= 3 &&
+       } else if (ver >= 3 &&
                   !(IS_I915G(eb->i915) || IS_I915GM(eb->i915))) {
                *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
                *batch++ = addr;

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 91cbe20..3286bcd 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -794,7 +794,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                return PTR_ERR(i915);
 
        /* Disable nuclear pageflip by default on pre-ILK */
-       if (!i915->params.nuclear_pageflip && match_info->gen < 5)
+       if (!i915->params.nuclear_pageflip && match_info->graphics_ver < 5)
                i915->drm.driver_features &= ~DRIVER_ATOMIC;
 
        /*

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index de02207..b58bc7b 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -95,7 +95,7 @@ static const char *iommu_name(void)
 void intel_device_info_print_static(const struct intel_device_info *info,
                                    struct drm_printer *p)
 {
-       drm_printf(p, "gen: %d\n", info->gen);
+       drm_printf(p, "graphics_ver: %u\n", info->graphics_ver);
        drm_printf(p, "gt: %d\n", info->gt);
        drm_printf(p, "iommu: %s\n", iommu_name());
        drm_printf(p, "memory-regions: %x\n", info->memory_regions);