PCI: amlogic: meson: Don't use FAST_LINK_MODE to set up link

The vim3l board does not work with a standard PCIe switch (ASM1184e),
spitting all kind of errors - hinting at HW misconfiguration (no link,
port enumeration issues, etc).

According to the the Synopsys DWC PCIe Reference Manual, in the section
dedicated to the PLCR register, bit 7 is described (FAST_LINK_MODE) as:

"Sets all internal timers to fast mode for simulation purposes."

it is sound to set this bit from a simulation perspective, but on actual
silicon, which expects timers to have a nominal value, it is not.

Make sure the FAST_LINK_MODE bit is cleared when configuring the RC
to solve this problem.

Link: https://lore.kernel.org/r/20200429164230.309922-1-maz@kernel.org
Fixes: 9c0ef6d34fdb ("PCI: amlogic: Add the Amlogic Meson PCIe controller driver")
Signed-off-by: Marc Zyngier <maz@kernel.org>
[lorenzo.pieralisi@arm.com: commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>

diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controller/dwc/pci-meson.c
index 3715dce..ca59ba9 100644 (file)
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -289,11 +289,11 @@ static void meson_pcie_init_dw(struct meson_pcie *mp)
        meson_cfg_writel(mp, val, PCIE_CFG0);
 
        val = meson_elb_readl(mp, PCIE_PORT_LINK_CTRL_OFF);
-       val &= ~LINK_CAPABLE_MASK;
+       val &= ~(LINK_CAPABLE_MASK | FAST_LINK_MODE);
        meson_elb_writel(mp, val, PCIE_PORT_LINK_CTRL_OFF);
 
        val = meson_elb_readl(mp, PCIE_PORT_LINK_CTRL_OFF);
-       val |= LINK_CAPABLE_X1 | FAST_LINK_MODE;
+       val |= LINK_CAPABLE_X1;
        meson_elb_writel(mp, val, PCIE_PORT_LINK_CTRL_OFF);
 
        val = meson_elb_readl(mp, PCIE_GEN2_CTRL_OFF);