drm/i915/gt: Initialize reserved and unspecified MOCS indices
authorAyaz A Siddiqui <ayaz.siddiqui@intel.com>
Wed, 29 Jul 2020 10:25:39 +0000 (15:55 +0530)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 19 Oct 2020 17:29:44 +0000 (13:29 -0400)
In order to avoid functional breakage of mis-programmed applications that
have grown to depend on unused MOCS entries, we are programming
those entries to be equal to fully cached ("L3 + LLC") entry.

These reserved and unspecified entries should not be used as they may be
changed to less performant variants with better coherency in the future
if more entries are needed.

v2: As suggested by Lucas De Marchi to utilise __init_mocs_table for
programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
with desired value.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Tomasz Lis <tomasz.lis@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Francisco Jerez <currojerez@riseup.net>
Cc: Mathew Alwin <alwin.mathew@intel.com>
Cc: Mcguire Russell W <russell.w.mcguire@intel.com>
Cc: Spruit Neil R <neil.r.spruit@intel.com>
Cc: Zhou Cheng <cheng.zhou@intel.com>
Cc: Benemelis Mike G <mike.g.benemelis@intel.com>
Signed-off-by: Ayaz A Siddiqui <ayaz.siddiqui@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20200729102539.134731-2-ayaz.siddiqui@intel.com
Cc: stable@vger.kernel.org
(cherry picked from commit 4d8a5cfe3b131f60903949f998c5961cc922e0b0)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/i915/gt/intel_mocs.c

index 632e08a..b8f56e6 100644 (file)
@@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
                   L3_1_UC)
 
 static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
-       /* Base - Error (Reserved for Non-Use) */
-       MOCS_ENTRY(0, 0x0, 0x0),
-       /* Base - Reserved */
-       MOCS_ENTRY(1, 0x0, 0x0),
-
+       /*
+        * NOTE:
+        * Reserved and unspecified MOCS indices have been set to (L3 + LCC).
+        * These reserved entries should never be used, they may be changed
+        * to low performant variants with better coherency in the future if
+        * more entries are needed. We are programming index I915_MOCS_PTE(1)
+        * only, __init_mocs_table() take care to program unused index with
+        * this entry.
+        */
+       MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
+                  L3_3_WB),
        GEN11_MOCS_ENTRIES,
 
        /* Implicitly enable L1 - HDC:L1 + L3 + LLC */