drm/amdgpu: disable rom clock gating support for APUs
authorHawking Zhang <Hawking.Zhang@amd.com>
Fri, 23 Oct 2020 13:48:19 +0000 (21:48 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 13 Nov 2020 05:13:35 +0000 (00:13 -0500)
ROM clock gating enable/disable is not supported
on APU platform. (i.e. CGTT_ROM_CLK_CTRL0 register
is not availabe on APU). SMUIO callbacks will check
APU flag before enable/disable rom clock gating, and
skip the programming. Accordingly, query clock gating
status through CGTT_ROM_CLK_CTRL0 also doesn't support
on APU platform.

The change applies to RAVEN/RAVEN2/PICASSO/RENOIR.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/soc15.c

index 7d3788c..8a23636 100644 (file)
@@ -1169,7 +1169,6 @@ static int soc15_common_early_init(void *handle)
                                AMD_CG_SUPPORT_GFX_CGLS |
                                AMD_CG_SUPPORT_BIF_LS |
                                AMD_CG_SUPPORT_HDP_LS |
-                               AMD_CG_SUPPORT_ROM_MGCG |
                                AMD_CG_SUPPORT_MC_MGCG |
                                AMD_CG_SUPPORT_MC_LS |
                                AMD_CG_SUPPORT_SDMA_MGCG |
@@ -1187,7 +1186,6 @@ static int soc15_common_early_init(void *handle)
                                AMD_CG_SUPPORT_GFX_CGLS |
                                AMD_CG_SUPPORT_BIF_LS |
                                AMD_CG_SUPPORT_HDP_LS |
-                               AMD_CG_SUPPORT_ROM_MGCG |
                                AMD_CG_SUPPORT_MC_MGCG |
                                AMD_CG_SUPPORT_MC_LS |
                                AMD_CG_SUPPORT_SDMA_MGCG |
@@ -1211,7 +1209,6 @@ static int soc15_common_early_init(void *handle)
                                AMD_CG_SUPPORT_HDP_LS |
                                AMD_CG_SUPPORT_DRM_MGCG |
                                AMD_CG_SUPPORT_DRM_LS |
-                               AMD_CG_SUPPORT_ROM_MGCG |
                                AMD_CG_SUPPORT_MC_MGCG |
                                AMD_CG_SUPPORT_MC_LS |
                                AMD_CG_SUPPORT_SDMA_MGCG |
@@ -1264,7 +1261,6 @@ static int soc15_common_early_init(void *handle)
                                 AMD_CG_SUPPORT_SDMA_LS |
                                 AMD_CG_SUPPORT_BIF_LS |
                                 AMD_CG_SUPPORT_HDP_LS |
-                                AMD_CG_SUPPORT_ROM_MGCG |
                                 AMD_CG_SUPPORT_VCN_MGCG |
                                 AMD_CG_SUPPORT_JPEG_MGCG |
                                 AMD_CG_SUPPORT_IH_CG |