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clk: sunxi-ng: h6: Allow GPU to change parent rate
author
Jernej Skrabec
<jernej.skrabec@siol.net>
Tue, 1 Oct 2019 20:06:56 +0000
(22:06 +0200)
committer
Maxime Ripard
<mripard@kernel.org>
Wed, 2 Oct 2019 06:05:40 +0000
(08:05 +0200)
GPU PLL was designed with dynamic frequency switching in mind so driver
can adjust rate based on the GPU load.
Allow GPU clock to change parent rate (GPU PLL is the only possible
parent of GPU clock).
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <mripard@kernel.org>
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
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diff --git
a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index
ed6338d
..
f2497d0
100644
(file)
--- a/
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/
drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@
-299,7
+299,7
@@
static SUNXI_CCU_M_WITH_MUX_GATE(gpu_clk, "gpu", gpu_parents, 0x670,
0, 3, /* M */
24, 1, /* mux */
BIT(31), /* gate */
-
0
);
+
CLK_SET_RATE_PARENT
);
static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "psi-ahb1-ahb2",
0x67c, BIT(0), 0);