pinctrl: cannonlake: Provide Interrupt Status register offset
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 23 Jul 2019 15:56:27 +0000 (18:56 +0300)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Wed, 7 Aug 2019 13:45:41 +0000 (16:45 +0300)
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
drivers/pinctrl/intel/pinctrl-cannonlake.c

index 08024b0..f51b27b 100644 (file)
@@ -19,6 +19,7 @@
 #define CNL_PADCFGLOCK         0x080
 #define CNL_LP_HOSTSW_OWN      0x0b0
 #define CNL_H_HOSTSW_OWN       0x0c0
+#define CNL_GPI_IS             0x100
 #define CNL_GPI_IE             0x120
 
 #define CNL_GPP(r, s, e, g)                            \
@@ -37,6 +38,7 @@
                .padown_offset = CNL_PAD_OWN,           \
                .padcfglock_offset = CNL_PADCFGLOCK,    \
                .hostown_offset = (o),                  \
+               .is_offset = CNL_GPI_IS,                \
                .ie_offset = CNL_GPI_IE,                \
                .pin_base = (s),                        \
                .npins = ((e) - (s) + 1),               \