mmc: tmio-mmc: add support for 32bit data port

For the r7s72100 SOC, the DATA_PORT register was changed to 32-bits wide.
Therefore a new flag has been created that will allow 32-bit reads/writes
to the DATA_PORT register instead of 16-bit (because 16-bits accesses are
not supported).

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 8e126af..839755c 100644 (file)
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -245,6 +245,12 @@ static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int ad
               readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
 }
 
+static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
+               u32 *buf, int count)
+{
+       readsl(host->ctl + (addr << host->bus_shift), buf, count);
+}
+
 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
 {
        /* If there is a hook and it returns non-zero then there
@@ -267,4 +273,10 @@ static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int
        writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
 }
 
+static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
+               const u32 *buf, int count)
+{
+       writesl(host->ctl + (addr << host->bus_shift), buf, count);
+}
+
 #endif

diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
index 7005676..8b75a9b 100644 (file)
--- a/drivers/mmc/host/tmio_mmc_pio.c
+++ b/drivers/mmc/host/tmio_mmc_pio.c
@@ -393,6 +393,36 @@ static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
        /*
         * Transfer the data
         */
+       if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
+               u8 data[4] = { };
+
+               if (is_read)
+                       sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
+                                          count >> 2);
+               else
+                       sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
+                                           count >> 2);
+
+               /* if count was multiple of 4 */
+               if (!(count & 0x3))
+                       return;
+
+               buf8 = (u8 *)(buf + (count >> 2));
+               count %= 4;
+
+               if (is_read) {
+                       sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
+                                          (u32 *)data, 1);
+                       memcpy(buf8, data, count);
+               } else {
+                       memcpy(data, buf8, count);
+                       sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
+                                           (u32 *)data, 1);
+               }
+
+               return;
+       }
+
        if (is_read)
                sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
        else

diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 7a26286..fba44ab 100644 (file)
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -99,6 +99,11 @@
  */
 #define TMIO_MMC_SDIO_STATUS_QUIRK     (1 << 8)
 
+/*
+ * Some controllers have a 32-bit wide data port register
+ */
+#define TMIO_MMC_32BIT_DATA_PORT       (1 << 9)
+
 /*
  * Some controllers allows to set SDx actual clock
  */