clk: imx: rename imx_obtain_fixed_clk_hw() to imx_get_clk_hw_by_name()
authorDario Binacchi <dario.binacchi@amarulasolutions.com>
Sun, 13 Nov 2022 18:08:39 +0000 (19:08 +0100)
committerAbel Vesa <abel.vesa@linaro.org>
Fri, 25 Nov 2022 09:22:15 +0000 (11:22 +0200)
The imx_obtain_fixed_clk_hw name was wrong and misleading. Renaming it
to imx_get_clk_hw_by_name clarifies the purpose of the function, and
will allow it to be used not only for fixed rate clocks but also in
wider contexts.

No functional changes intended.

The replacements were made with the following command:

grep -rl 'imx_obtain_fixed_clk_hw' ./ | \
     xargs sed -i 's/imx_obtain_fixed_clk_hw/imx_get_clk_hw_by_name/g'

Tested on a BSH SystemMaster (SMM) S2 board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20221113180839.1625832-1-dario.binacchi@amarulasolutions.com
13 files changed:
drivers/clk/imx/clk-imx6sll.c
drivers/clk/imx/clk-imx6sx.c
drivers/clk/imx/clk-imx6ul.c
drivers/clk/imx/clk-imx7d.c
drivers/clk/imx/clk-imx7ulp.c
drivers/clk/imx/clk-imx8mm.c
drivers/clk/imx/clk-imx8mn.c
drivers/clk/imx/clk-imx8mp.c
drivers/clk/imx/clk-imx8mq.c
drivers/clk/imx/clk-imx93.c
drivers/clk/imx/clk-imxrt1050.c
drivers/clk/imx/clk.c
drivers/clk/imx/clk.h

index 31d777f..1c93516 100644 (file)
@@ -91,12 +91,12 @@ static void __init imx6sll_clocks_init(struct device_node *ccm_node)
 
        hws[IMX6SLL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
 
-       hws[IMX6SLL_CLK_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
-       hws[IMX6SLL_CLK_OSC] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
+       hws[IMX6SLL_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");
+       hws[IMX6SLL_CLK_OSC] = imx_get_clk_hw_by_name(ccm_node, "osc");
 
        /* ipp_di clock is external input */
-       hws[IMX6SLL_CLK_IPP_DI0] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di0");
-       hws[IMX6SLL_CLK_IPP_DI1] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di1");
+       hws[IMX6SLL_CLK_IPP_DI0] = imx_get_clk_hw_by_name(ccm_node, "ipp_di0");
+       hws[IMX6SLL_CLK_IPP_DI1] = imx_get_clk_hw_by_name(ccm_node, "ipp_di1");
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx6sll-anatop");
        base = of_iomap(np, 0);
index 598f3cf..b378531 100644 (file)
@@ -132,16 +132,16 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
 
        hws[IMX6SX_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
 
-       hws[IMX6SX_CLK_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
-       hws[IMX6SX_CLK_OSC] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
+       hws[IMX6SX_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");
+       hws[IMX6SX_CLK_OSC] = imx_get_clk_hw_by_name(ccm_node, "osc");
 
        /* ipp_di clock is external input */
-       hws[IMX6SX_CLK_IPP_DI0] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di0");
-       hws[IMX6SX_CLK_IPP_DI1] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di1");
+       hws[IMX6SX_CLK_IPP_DI0] = imx_get_clk_hw_by_name(ccm_node, "ipp_di0");
+       hws[IMX6SX_CLK_IPP_DI1] = imx_get_clk_hw_by_name(ccm_node, "ipp_di1");
 
        /* Clock source from external clock via CLK1/2 PAD */
-       hws[IMX6SX_CLK_ANACLK1] = imx_obtain_fixed_clk_hw(ccm_node, "anaclk1");
-       hws[IMX6SX_CLK_ANACLK2] = imx_obtain_fixed_clk_hw(ccm_node, "anaclk2");
+       hws[IMX6SX_CLK_ANACLK1] = imx_get_clk_hw_by_name(ccm_node, "anaclk1");
+       hws[IMX6SX_CLK_ANACLK2] = imx_get_clk_hw_by_name(ccm_node, "anaclk2");
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop");
        base = of_iomap(np, 0);
index 520b100..67a7a77 100644 (file)
@@ -126,12 +126,12 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
 
        hws[IMX6UL_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
 
-       hws[IMX6UL_CLK_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
-       hws[IMX6UL_CLK_OSC] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
+       hws[IMX6UL_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");
+       hws[IMX6UL_CLK_OSC] = imx_get_clk_hw_by_name(ccm_node, "osc");
 
        /* ipp_di clock is external input */
-       hws[IMX6UL_CLK_IPP_DI0] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di0");
-       hws[IMX6UL_CLK_IPP_DI1] = imx_obtain_fixed_clk_hw(ccm_node, "ipp_di1");
+       hws[IMX6UL_CLK_IPP_DI0] = imx_get_clk_hw_by_name(ccm_node, "ipp_di0");
+       hws[IMX6UL_CLK_IPP_DI1] = imx_get_clk_hw_by_name(ccm_node, "ipp_di1");
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-anatop");
        base = of_iomap(np, 0);
index cbf8131..d681b6c 100644 (file)
@@ -391,8 +391,8 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
        hws = clk_hw_data->hws;
 
        hws[IMX7D_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
-       hws[IMX7D_OSC_24M_CLK] = imx_obtain_fixed_clk_hw(ccm_node, "osc");
-       hws[IMX7D_CKIL] = imx_obtain_fixed_clk_hw(ccm_node, "ckil");
+       hws[IMX7D_OSC_24M_CLK] = imx_get_clk_hw_by_name(ccm_node, "osc");
+       hws[IMX7D_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil");
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx7d-anatop");
        base = of_iomap(np, 0);
index b6e45e7..208a0ab 100644 (file)
@@ -59,11 +59,11 @@ static void __init imx7ulp_clk_scg1_init(struct device_node *np)
 
        hws[IMX7ULP_CLK_DUMMY]          = imx_clk_hw_fixed("dummy", 0);
 
-       hws[IMX7ULP_CLK_ROSC]           = imx_obtain_fixed_clk_hw(np, "rosc");
-       hws[IMX7ULP_CLK_SOSC]           = imx_obtain_fixed_clk_hw(np, "sosc");
-       hws[IMX7ULP_CLK_SIRC]           = imx_obtain_fixed_clk_hw(np, "sirc");
-       hws[IMX7ULP_CLK_FIRC]           = imx_obtain_fixed_clk_hw(np, "firc");
-       hws[IMX7ULP_CLK_UPLL]           = imx_obtain_fixed_clk_hw(np, "upll");
+       hws[IMX7ULP_CLK_ROSC]           = imx_get_clk_hw_by_name(np, "rosc");
+       hws[IMX7ULP_CLK_SOSC]           = imx_get_clk_hw_by_name(np, "sosc");
+       hws[IMX7ULP_CLK_SIRC]           = imx_get_clk_hw_by_name(np, "sirc");
+       hws[IMX7ULP_CLK_FIRC]           = imx_get_clk_hw_by_name(np, "firc");
+       hws[IMX7ULP_CLK_UPLL]           = imx_get_clk_hw_by_name(np, "upll");
 
        /* SCG1 */
        base = of_iomap(np, 0);
index b6d2758..cb44e81 100644 (file)
@@ -312,12 +312,12 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
        hws = clk_hw_data->hws;
 
        hws[IMX8MM_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
-       hws[IMX8MM_CLK_24M] = imx_obtain_fixed_clk_hw(np, "osc_24m");
-       hws[IMX8MM_CLK_32K] = imx_obtain_fixed_clk_hw(np, "osc_32k");
-       hws[IMX8MM_CLK_EXT1] = imx_obtain_fixed_clk_hw(np, "clk_ext1");
-       hws[IMX8MM_CLK_EXT2] = imx_obtain_fixed_clk_hw(np, "clk_ext2");
-       hws[IMX8MM_CLK_EXT3] = imx_obtain_fixed_clk_hw(np, "clk_ext3");
-       hws[IMX8MM_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
+       hws[IMX8MM_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m");
+       hws[IMX8MM_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k");
+       hws[IMX8MM_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
+       hws[IMX8MM_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2");
+       hws[IMX8MM_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3");
+       hws[IMX8MM_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop");
        base = of_iomap(np, 0);
index 2afea90..af256ad 100644 (file)
@@ -332,12 +332,12 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
        hws = clk_hw_data->hws;
 
        hws[IMX8MN_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
-       hws[IMX8MN_CLK_24M] = imx_obtain_fixed_clk_hw(np, "osc_24m");
-       hws[IMX8MN_CLK_32K] = imx_obtain_fixed_clk_hw(np, "osc_32k");
-       hws[IMX8MN_CLK_EXT1] = imx_obtain_fixed_clk_hw(np, "clk_ext1");
-       hws[IMX8MN_CLK_EXT2] = imx_obtain_fixed_clk_hw(np, "clk_ext2");
-       hws[IMX8MN_CLK_EXT3] = imx_obtain_fixed_clk_hw(np, "clk_ext3");
-       hws[IMX8MN_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
+       hws[IMX8MN_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m");
+       hws[IMX8MN_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k");
+       hws[IMX8MN_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
+       hws[IMX8MN_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2");
+       hws[IMX8MN_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3");
+       hws[IMX8MN_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop");
        base = of_iomap(np, 0);
index 423a5d0..a57d877 100644 (file)
@@ -438,12 +438,12 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
        hws = clk_hw_data->hws;
 
        hws[IMX8MP_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
-       hws[IMX8MP_CLK_24M] = imx_obtain_fixed_clk_hw(np, "osc_24m");
-       hws[IMX8MP_CLK_32K] = imx_obtain_fixed_clk_hw(np, "osc_32k");
-       hws[IMX8MP_CLK_EXT1] = imx_obtain_fixed_clk_hw(np, "clk_ext1");
-       hws[IMX8MP_CLK_EXT2] = imx_obtain_fixed_clk_hw(np, "clk_ext2");
-       hws[IMX8MP_CLK_EXT3] = imx_obtain_fixed_clk_hw(np, "clk_ext3");
-       hws[IMX8MP_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
+       hws[IMX8MP_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m");
+       hws[IMX8MP_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k");
+       hws[IMX8MP_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
+       hws[IMX8MP_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2");
+       hws[IMX8MP_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3");
+       hws[IMX8MP_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");
 
        hws[IMX8MP_AUDIO_PLL1_REF_SEL] = imx_clk_hw_mux("audio_pll1_ref_sel", anatop_base + 0x0, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
        hws[IMX8MP_AUDIO_PLL2_REF_SEL] = imx_clk_hw_mux("audio_pll2_ref_sel", anatop_base + 0x14, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels));
index 882dcad..2bcaec1 100644 (file)
@@ -297,13 +297,13 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
        hws = clk_hw_data->hws;
 
        hws[IMX8MQ_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
-       hws[IMX8MQ_CLK_32K] = imx_obtain_fixed_clk_hw(np, "ckil");
-       hws[IMX8MQ_CLK_25M] = imx_obtain_fixed_clk_hw(np, "osc_25m");
-       hws[IMX8MQ_CLK_27M] = imx_obtain_fixed_clk_hw(np, "osc_27m");
-       hws[IMX8MQ_CLK_EXT1] = imx_obtain_fixed_clk_hw(np, "clk_ext1");
-       hws[IMX8MQ_CLK_EXT2] = imx_obtain_fixed_clk_hw(np, "clk_ext2");
-       hws[IMX8MQ_CLK_EXT3] = imx_obtain_fixed_clk_hw(np, "clk_ext3");
-       hws[IMX8MQ_CLK_EXT4] = imx_obtain_fixed_clk_hw(np, "clk_ext4");
+       hws[IMX8MQ_CLK_32K] = imx_get_clk_hw_by_name(np, "ckil");
+       hws[IMX8MQ_CLK_25M] = imx_get_clk_hw_by_name(np, "osc_25m");
+       hws[IMX8MQ_CLK_27M] = imx_get_clk_hw_by_name(np, "osc_27m");
+       hws[IMX8MQ_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
+       hws[IMX8MQ_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2");
+       hws[IMX8MQ_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3");
+       hws[IMX8MQ_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");
 
        np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop");
        base = of_iomap(np, 0);
index 5bd06eb..e464d9e 100644 (file)
@@ -271,9 +271,9 @@ static int imx93_clocks_probe(struct platform_device *pdev)
        clks = clk_hw_data->hws;
 
        clks[IMX93_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0);
-       clks[IMX93_CLK_24M] = imx_obtain_fixed_clk_hw(np, "osc_24m");
-       clks[IMX93_CLK_32K] = imx_obtain_fixed_clk_hw(np, "osc_32k");
-       clks[IMX93_CLK_EXT1] = imx_obtain_fixed_clk_hw(np, "clk_ext1");
+       clks[IMX93_CLK_24M] = imx_get_clk_hw_by_name(np, "osc_24m");
+       clks[IMX93_CLK_32K] = imx_get_clk_hw_by_name(np, "osc_32k");
+       clks[IMX93_CLK_EXT1] = imx_get_clk_hw_by_name(np, "clk_ext1");
 
        clks[IMX93_CLK_SYS_PLL_PFD0] = imx_clk_hw_fixed("sys_pll_pfd0", 1000000000);
        clks[IMX93_CLK_SYS_PLL_PFD0_DIV2] = imx_clk_hw_fixed_factor("sys_pll_pfd0_div2",
index 39f77c0..e972abd 100644 (file)
@@ -50,7 +50,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
        clk_hw_data->num = IMXRT1050_CLK_END;
        hws = clk_hw_data->hws;
 
-       hws[IMXRT1050_CLK_OSC] = imx_obtain_fixed_clk_hw(np, "osc");
+       hws[IMXRT1050_CLK_OSC] = imx_get_clk_hw_by_name(np, "osc");
 
        anp = of_find_compatible_node(NULL, NULL, "fsl,imxrt-anatop");
        pll_base = of_iomap(anp, 0);
index 5582f18..b636cc0 100644 (file)
@@ -110,8 +110,7 @@ struct clk_hw *imx_obtain_fixed_clock_hw(
        return __clk_get_hw(clk);
 }
 
-struct clk_hw * imx_obtain_fixed_clk_hw(struct device_node *np,
-                                       const char *name)
+struct clk_hw *imx_get_clk_hw_by_name(struct device_node *np, const char *name)
 {
        struct clk *clk;
 
@@ -121,7 +120,7 @@ struct clk_hw * imx_obtain_fixed_clk_hw(struct device_node *np,
 
        return __clk_get_hw(clk);
 }
-EXPORT_SYMBOL_GPL(imx_obtain_fixed_clk_hw);
+EXPORT_SYMBOL_GPL(imx_get_clk_hw_by_name);
 
 /*
  * This fixups the register CCM_CSCMR1 write value.
index dd49f90..689b3ad 100644 (file)
@@ -288,8 +288,7 @@ struct clk * imx_obtain_fixed_clock(
 struct clk_hw *imx_obtain_fixed_clock_hw(
                        const char *name, unsigned long rate);
 
-struct clk_hw *imx_obtain_fixed_clk_hw(struct device_node *np,
-                                      const char *name);
+struct clk_hw *imx_get_clk_hw_by_name(struct device_node *np, const char *name);
 
 struct clk_hw *imx_clk_hw_gate_exclusive(const char *name, const char *parent,
         void __iomem *reg, u8 shift, u32 exclusive_mask);