can: m_can: Cache tx putidx

m_can_tx_handler is the only place where data is written to the tx fifo.
We can calculate the putidx in the driver code here to avoid the
dependency on the txfqs register.

Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Reviewed-by: Simon Horman <simon.horman@corigine.com>
Link: https://lore.kernel.org/all/20240207093220.2681425-10-msp@baylibre.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>

diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index 1b62613..a8e7b91 100644 (file)
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -1504,6 +1504,10 @@ static int m_can_start(struct net_device *dev)
 
        m_can_enable_all_interrupts(cdev);
 
+       if (cdev->version > 30)
+               cdev->tx_fifo_putidx = FIELD_GET(TXFQS_TFQPI_MASK,
+                                                m_can_read(cdev, M_CAN_TXFQS));
+
        return 0;
 }
 
@@ -1793,7 +1797,7 @@ static netdev_tx_t m_can_tx_handler(struct m_can_classdev *cdev)
                }
 
                /* get put index for frame */
-               putidx = FIELD_GET(TXFQS_TFQPI_MASK, txfqs);
+               putidx = cdev->tx_fifo_putidx;
 
                /* Construct DLC Field, with CAN-FD configuration.
                 * Use the put index of the fifo as the message marker,
@@ -1827,6 +1831,8 @@ static netdev_tx_t m_can_tx_handler(struct m_can_classdev *cdev)
 
                /* Enable TX FIFO element to start transfer  */
                m_can_write(cdev, M_CAN_TXBAR, (1 << putidx));
+               cdev->tx_fifo_putidx = (++cdev->tx_fifo_putidx >= cdev->can.echo_skb_max ?
+                                       0 : cdev->tx_fifo_putidx);
 
                /* stop network queue if fifo full */
                if (m_can_tx_fifo_full(cdev) ||

diff --git a/drivers/net/can/m_can/m_can.h b/drivers/net/can/m_can/m_can.h
index 1e461d3..0de42fc 100644 (file)
--- a/drivers/net/can/m_can/m_can.h
+++ b/drivers/net/can/m_can/m_can.h
@@ -101,6 +101,9 @@ struct m_can_classdev {
        u32 tx_max_coalesced_frames_irq;
        u32 tx_coalesce_usecs_irq;
 
+       // Store this internally to avoid fetch delays on peripheral chips
+       int tx_fifo_putidx;
+
        struct mram_cfg mcfg[MRAM_CFG_NUM];
 
        struct hrtimer hrtimer;