drm/xe: Drop EXECLIST_CONTROL from error state dump
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 9 Nov 2023 19:46:07 +0000 (11:46 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 21 Dec 2023 16:43:38 +0000 (11:43 -0500)
EXECLIST_CONTROL ($enginebase + 0x550) is a write-only register; we
shouldn't be trying to read or report it as part of the device error
state.

Bspec: 45910, 60335
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20231109194606.1835284-2-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_hw_engine.c
drivers/gpu/drm/xe/xe_hw_engine_types.h

index b5b0845..e831e63 100644 (file)
@@ -704,8 +704,6 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
        snapshot->reg.ring_execlist_sq_contents_hi =
                hw_engine_mmio_read32(hwe,
                                      RING_EXECLIST_SQ_CONTENTS_HI(0));
-       snapshot->reg.ring_execlist_control =
-               hw_engine_mmio_read32(hwe, RING_EXECLIST_CONTROL(0));
        snapshot->reg.ring_start = hw_engine_mmio_read32(hwe, RING_START(0));
        snapshot->reg.ring_head =
                hw_engine_mmio_read32(hwe, RING_HEAD(0)) & HEAD_ADDR;
@@ -765,8 +763,6 @@ void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
                   snapshot->reg.ring_execlist_sq_contents_lo);
        drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS_HI: 0x%08x\n",
                   snapshot->reg.ring_execlist_sq_contents_hi);
-       drm_printf(p, "\tRING_EXECLIST_CONTROL: 0x%08x\n",
-                  snapshot->reg.ring_execlist_control);
        drm_printf(p, "\tRING_START: 0x%08x\n", snapshot->reg.ring_start);
        drm_printf(p, "\tRING_HEAD:  0x%08x\n", snapshot->reg.ring_head);
        drm_printf(p, "\tRING_TAIL:  0x%08x\n", snapshot->reg.ring_tail);
index 5d4ee29..39908de 100644 (file)
@@ -183,8 +183,6 @@ struct xe_hw_engine_snapshot {
                u32 ring_execlist_sq_contents_lo;
                /** @ring_execlist_sq_contents_hi: RING_EXECLIST_SQ_CONTENTS + 4 */
                u32 ring_execlist_sq_contents_hi;
-               /** @ring_execlist_control: RING_EXECLIST_CONTROL */
-               u32 ring_execlist_control;
                /** @ring_start: RING_START */
                u32 ring_start;
                /** @ring_head: RING_HEAD */