drm/i915: Preallocate the debug power domain wakerefs array

Since the current size of intel_display_power_domain_set struct is
close to 1kB, it's better to use preallocated memory for it. The only
user of the intel_display_power_get/put_in_set() allocating the struct
on stack is hsw_get_pipe_config(), so we can avoid potential stack
overallocations by moving the struct here to the preallocated
intel_crtc struct (hsw_get_pipe_config() is non-reentrant wrt. each
CRTC).

This patch replaces
https://lore.kernel.org/intel-gfx/20221107170917.3566758-5-imre.deak@intel.com/T/#md3f6cdf17fcd

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221114122251.21327-3-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 126f021..b3e2370 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4051,20 +4051,19 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
                                struct intel_crtc_state *pipe_config)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-       struct intel_display_power_domain_set power_domain_set = { };
        bool active;
        u32 tmp;
 
-       if (!intel_display_power_get_in_set_if_enabled(dev_priv, &power_domain_set,
+       if (!intel_display_power_get_in_set_if_enabled(dev_priv, &crtc->hw_readout_power_domains,
                                                       POWER_DOMAIN_PIPE(crtc->pipe)))
                return false;
 
        pipe_config->shared_dpll = NULL;
 
-       active = hsw_get_transcoder_state(crtc, pipe_config, &power_domain_set);
+       active = hsw_get_transcoder_state(crtc, pipe_config, &crtc->hw_readout_power_domains);
 
        if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) &&
-           bxt_get_dsi_transcoder_state(crtc, pipe_config, &power_domain_set)) {
+           bxt_get_dsi_transcoder_state(crtc, pipe_config, &crtc->hw_readout_power_domains)) {
                drm_WARN_ON(&dev_priv->drm, active);
                active = true;
        }
@@ -4123,7 +4122,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
                pipe_config->ips_linetime =
                        REG_FIELD_GET(HSW_IPS_LINETIME_MASK, tmp);
 
-       if (intel_display_power_get_in_set_if_enabled(dev_priv, &power_domain_set,
+       if (intel_display_power_get_in_set_if_enabled(dev_priv, &crtc->hw_readout_power_domains,
                                                      POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe))) {
                if (DISPLAY_VER(dev_priv) >= 9)
                        skl_get_pfit_config(pipe_config);
@@ -4154,7 +4153,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
        }
 
 out:
-       intel_display_power_put_all_in_set(dev_priv, &power_domain_set);
+       intel_display_power_put_all_in_set(dev_priv, &crtc->hw_readout_power_domains);
 
        return active;
 }

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8da87cb..f073950 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1375,6 +1375,7 @@ struct intel_crtc {
        u16 vmax_vblank_start;
 
        struct intel_display_power_domain_set enabled_power_domains;
+       struct intel_display_power_domain_set hw_readout_power_domains;
        struct intel_overlay *overlay;
 
        struct intel_crtc_state *config;