pwm: bcm2835: Fix period_ns range check

The range check for period_ns was written under assumption of a fixed
PWM clock. With clk-bcm2835 driver the PWM clock is a dynamic one.
So fix this by doing the range check on the period register value.

Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>

diff --git a/drivers/pwm/pwm-bcm2835.c b/drivers/pwm/pwm-bcm2835.c
index 5276306..2c82386 100644 (file)
--- a/drivers/pwm/pwm-bcm2835.c
+++ b/drivers/pwm/pwm-bcm2835.c
@@ -21,7 +21,7 @@
 #define PERIOD(x)              (((x) * 0x10) + 0x10)
 #define DUTY(x)                        (((x) * 0x10) + 0x14)
 
-#define MIN_PERIOD             108             /* 9.2 MHz max. PWM clock */
+#define PERIOD_MIN             0x2
 
 struct bcm2835_pwm {
        struct pwm_chip chip;
@@ -64,6 +64,7 @@ static int bcm2835_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
        struct bcm2835_pwm *pc = to_bcm2835_pwm(chip);
        unsigned long rate = clk_get_rate(pc->clk);
        unsigned long scaler;
+       u32 period;
 
        if (!rate) {
                dev_err(pc->dev, "failed to get clock rate\n");
@@ -71,14 +72,14 @@ static int bcm2835_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
        }
 
        scaler = DIV_ROUND_CLOSEST(NSEC_PER_SEC, rate);
+       period = DIV_ROUND_CLOSEST(period_ns, scaler);
 
-       if (period_ns <= MIN_PERIOD)
+       if (period < PERIOD_MIN)
                return -EINVAL;
 
        writel(DIV_ROUND_CLOSEST(duty_ns, scaler),
               pc->base + DUTY(pwm->hwpwm));
-       writel(DIV_ROUND_CLOSEST(period_ns, scaler),
-              pc->base + PERIOD(pwm->hwpwm));
+       writel(period, pc->base + PERIOD(pwm->hwpwm));
 
        return 0;
 }