ASoC: cs42l42: Add bitclock frequency argument to cs42l42_pll_config()

Clean up the handling of bitclock frequency by keeping all the logic
in cs42l42_pcm_hw_params(), which then simply passes the frequency as
an argument to cs42l42_pll_config().

The previous code had become clunky as a legacy of earlier versions of
the clock handling. The logic was split across cs42l42_pcm_hw_params()
and cs42l42_pll_config(), with the params-derived bclk stashed in
struct cs42l42_private only to pass it to cs42l42_pll_config().

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: Martin Povišer <povik+lin@cutebit.org>
Link: https://lore.kernel.org/r/20220915094444.11434-3-povik+lin@cutebit.org
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index 21368ed..037a684 100644 (file)
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -647,18 +647,12 @@ static const struct cs42l42_pll_params pll_ratio_table[] = {
        { 24576000, 1, 0x03, 0x40, 0x000000, 0x03, 0x10, 12288000, 128, 1}
 };
 
-static int cs42l42_pll_config(struct snd_soc_component *component)
+static int cs42l42_pll_config(struct snd_soc_component *component, unsigned int clk)
 {
        struct cs42l42_private *cs42l42 = snd_soc_component_get_drvdata(component);
        int i;
-       u32 clk;
        u32 fsync;
 
-       if (!cs42l42->sclk)
-               clk = cs42l42->bclk;
-       else
-               clk = cs42l42->sclk;
-
        /* Don't reconfigure if there is an audio stream running */
        if (cs42l42->stream_use) {
                if (pll_ratio_table[cs42l42->pll_config].sclk == clk)
@@ -895,19 +889,25 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
        unsigned int width = (params_width(params) / 8) - 1;
        unsigned int slot_width = 0;
        unsigned int val = 0;
+       unsigned int bclk;
        int ret;
 
        cs42l42->srate = params_rate(params);
 
-       /*
-        * Assume 24-bit samples are in 32-bit slots, to prevent SCLK being
-        * more than assumed (which would result in overclocking).
-        */
-       if (params_width(params) == 24)
-               slot_width = 32;
+       if (cs42l42->sclk) {
+               /* machine driver has set the SCLK */
+               bclk = cs42l42->sclk;
+       } else {
+               /*
+                * Assume 24-bit samples are in 32-bit slots, to prevent SCLK being
+                * more than assumed (which would result in overclocking).
+                */
+               if (params_width(params) == 24)
+                       slot_width = 32;
 
-       /* I2S frame always has multiple of 2 channels */
-       cs42l42->bclk = snd_soc_tdm_params_to_bclk(params, slot_width, 0, 2);
+               /* I2S frame always has multiple of 2 channels */
+               bclk = snd_soc_tdm_params_to_bclk(params, slot_width, 0, 2);
+       }
 
        switch (substream->stream) {
        case SNDRV_PCM_STREAM_CAPTURE:
@@ -947,7 +947,7 @@ static int cs42l42_pcm_hw_params(struct snd_pcm_substream *substream,
                break;
        }
 
-       ret = cs42l42_pll_config(component);
+       ret = cs42l42_pll_config(component, bclk);
        if (ret)
                return ret;
 

diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h
index 50299c9..b4ba146 100644 (file)
--- a/sound/soc/codecs/cs42l42.h
+++ b/sound/soc/codecs/cs42l42.h
@@ -30,7 +30,6 @@ struct  cs42l42_private {
        struct snd_soc_jack *jack;
        struct mutex irq_lock;
        int pll_config;
-       int bclk;
        u32 sclk;
        u32 srate;
        u8 plug_state;