Merge tag 'amd-drm-next-6.3-2023-01-20' of https://gitlab.freedesktop.org/agd5f/linux...
authorDave Airlie <airlied@redhat.com>
Wed, 25 Jan 2023 02:07:53 +0000 (12:07 +1000)
committerDave Airlie <airlied@redhat.com>
Wed, 25 Jan 2023 02:07:53 +0000 (12:07 +1000)
amd-drm-next-6.3-2023-01-20:

amdgpu:
- Secure display fixes
- Fix scaling
- Misc code cleanups
- Display BW alloc logic updates
- DCN 3.2 fixes
- Fix power reporting on certain firmwares for CZN/RN
- SR-IOV fixes
- Link training cleanup and code rework
- HDCP fixes
- Reserved VMID fix
- Documentation updates
- Colorspace fixes
- RAS updates
- GC11.0 fixes
- VCN instance harvesting fixes
- DCN 3.1.4/5 workarounds for S/G displays
- Add PCIe info to the INFO IOCTL

amdkfd:
- XNACK fix

UAPI:
- Add PCIe gen/lanes info to the amdgpu INFO IOCTL
  Nesa ultimately plans to use this to make decisions about buffer placement optimizations
  Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20790

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230120234523.7610-1-alexander.deucher@amd.com
1  2 
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
drivers/gpu/drm/amd/pm/powerplay/smumgr/ci_smumgr.c

@@@ -38,7 -38,6 +38,7 @@@
  
  #include <drm/drm_aperture.h>
  #include <drm/drm_atomic_helper.h>
 +#include <drm/drm_crtc_helper.h>
  #include <drm/drm_fb_helper.h>
  #include <drm/drm_probe_helper.h>
  #include <drm/amdgpu_drm.h>
@@@ -2076,6 -2075,7 +2076,7 @@@ static int amdgpu_device_ip_early_init(
        struct drm_device *dev = adev_to_drm(adev);
        struct pci_dev *parent;
        int i, r;
+       bool total;
  
        amdgpu_device_enable_virtual_display(adev);
  
        if (amdgpu_sriov_vf(adev) && adev->asic_type == CHIP_SIENNA_CICHLID)
                adev->pm.pp_feature &= ~PP_OVERDRIVE_MASK;
  
+       total = true;
        for (i = 0; i < adev->num_ip_blocks; i++) {
                if ((amdgpu_ip_block_mask & (1 << i)) == 0) {
                        DRM_ERROR("disabled ip block: %d <%s>\n",
                                } else if (r) {
                                        DRM_ERROR("early_init of IP block <%s> failed %d\n",
                                                  adev->ip_blocks[i].version->funcs->name, r);
-                                       return r;
+                                       total = false;
                                } else {
                                        adev->ip_blocks[i].status.valid = true;
                                }
  
                }
        }
+       if (!total)
+               return -ENODEV;
  
        adev->cg_flags &= amdgpu_cg_mask;
        adev->pg_flags &= amdgpu_pg_mask;
@@@ -3992,8 -3995,10 +3996,8 @@@ void amdgpu_device_fini_hw(struct amdgp
        }
        amdgpu_fence_driver_hw_fini(adev);
  
 -      if (adev->mman.initialized) {
 -              flush_delayed_work(&adev->mman.bdev.wq);
 -              ttm_bo_lock_delayed_workqueue(&adev->mman.bdev);
 -      }
 +      if (adev->mman.initialized)
 +              drain_workqueue(adev->mman.bdev.wq);
  
        if (adev->pm_sysfs_en)
                amdgpu_pm_sysfs_fini(adev);
@@@ -5854,8 -5859,8 +5858,8 @@@ void amdgpu_device_invalidate_hdp(struc
  int amdgpu_in_reset(struct amdgpu_device *adev)
  {
        return atomic_read(&adev->reset_domain->in_gpu_reset);
      }
-       
+ }
  /**
   * amdgpu_device_halt() - bring hardware to some kind of halt state
   *
@@@ -38,6 -38,7 +38,6 @@@
  #include <linux/mmu_notifier.h>
  #include <linux/suspend.h>
  #include <linux/cc_platform.h>
 -#include <linux/fb.h>
  #include <linux/dynamic_debug.h>
  
  #include "amdgpu.h"
   * - 3.49.0 - Add gang submit into CS IOCTL
   * - 3.50.0 - Update AMDGPU_INFO_DEV_INFO IOCTL for minimum engine and memory clock
   *            Update AMDGPU_INFO_SENSOR IOCTL for PEAK_PSTATE engine and memory clock
+  *   3.51.0 - Return the PCIe gen and lanes from the INFO ioctl
   */
  #define KMS_DRIVER_MAJOR      3
- #define KMS_DRIVER_MINOR      50
+ #define KMS_DRIVER_MINOR      51
  #define KMS_DRIVER_PATCHLEVEL 0
  
  unsigned int amdgpu_vram_limit = UINT_MAX;
@@@ -161,8 -161,14 +161,14 @@@ void amdgpu_job_free_resources(struct a
        struct dma_fence *f;
        unsigned i;
  
-       /* use sched fence if available */
-       f = job->base.s_fence ? &job->base.s_fence->finished :  &job->hw_fence;
+       /* Check if any fences where initialized */
+       if (job->base.s_fence && job->base.s_fence->finished.ops)
+               f = &job->base.s_fence->finished;
+       else if (job->hw_fence.ops)
+               f = &job->hw_fence;
+       else
+               f = NULL;
        for (i = 0; i < job->num_ibs; ++i)
                amdgpu_ib_free(ring->adev, &job->ibs[i], f);
  }
@@@ -250,15 -256,15 +256,15 @@@ amdgpu_job_prepare_job(struct drm_sched
        struct dma_fence *fence = NULL;
        int r;
  
 +      if (!fence && job->gang_submit)
 +              fence = amdgpu_device_switch_gang(ring->adev, job->gang_submit);
 +
        while (!fence && job->vm && !job->vmid) {
                r = amdgpu_vmid_grab(job->vm, ring, job, &fence);
                if (r)
                        DRM_ERROR("Error getting VM ID (%d)\n", r);
        }
  
 -      if (!fence && job->gang_submit)
 -              fence = amdgpu_device_switch_gang(ring->adev, job->gang_submit);
 -
        return fence;
  }
  
@@@ -66,8 -66,6 +66,7 @@@
  
  #include "ivsrcid/ivsrcid_vislands30.h"
  
- #include "i2caux_interface.h"
 +#include <linux/backlight.h>
  #include <linux/module.h>
  #include <linux/moduleparam.h>
  #include <linux/types.h>
@@@ -1504,8 -1502,6 +1503,6 @@@ static int amdgpu_dm_init(struct amdgpu
                case IP_VERSION(3, 0, 1):
                case IP_VERSION(3, 1, 2):
                case IP_VERSION(3, 1, 3):
-               case IP_VERSION(3, 1, 4):
-               case IP_VERSION(3, 1, 5):
                case IP_VERSION(3, 1, 6):
                        init_data.flags.gpu_vm_support = true;
                        break;
@@@ -1734,15 -1730,11 +1731,11 @@@ static void amdgpu_dm_fini(struct amdgp
                adev->dm.vblank_control_workqueue = NULL;
        }
  
-       for (i = 0; i < adev->dm.display_indexes_num; i++) {
-               drm_encoder_cleanup(&adev->dm.mst_encoders[i].base);
-       }
        amdgpu_dm_destroy_drm_device(&adev->dm);
  
  #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
        if (adev->dm.secure_display_ctxs) {
-               for (i = 0; i < adev->dm.dc->caps.max_links; i++) {
+               for (i = 0; i < adev->mode_info.num_crtc; i++) {
                        if (adev->dm.secure_display_ctxs[i].crtc) {
                                flush_work(&adev->dm.secure_display_ctxs[i].notify_ta_work);
                                flush_work(&adev->dm.secure_display_ctxs[i].forward_roi_work);
@@@ -1949,10 -1941,7 +1942,7 @@@ static int dm_dmub_sw_init(struct amdgp
                dmub_asic = DMUB_ASIC_DCN21;
                break;
        case IP_VERSION(3, 0, 0):
-               if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 0))
-                       dmub_asic = DMUB_ASIC_DCN30;
-               else
-                       dmub_asic = DMUB_ASIC_DCN30;
+               dmub_asic = DMUB_ASIC_DCN30;
                break;
        case IP_VERSION(3, 0, 1):
                dmub_asic = DMUB_ASIC_DCN301;
@@@ -4337,10 -4326,6 +4327,10 @@@ static int amdgpu_dm_initialize_drm_dev
                amdgpu_set_panel_orientation(&aconnector->base);
        }
  
 +      /* If we didn't find a panel, notify the acpi video detection */
 +      if (dm->adev->flags & AMD_IS_APU && dm->num_of_edps == 0)
 +              acpi_video_report_nolcd();
 +
        /* Software is initialized. Now we can register interrupt handlers. */
        switch (adev->asic_type) {
  #if defined(CONFIG_DRM_AMD_DC_SI)
@@@ -5342,8 -5327,6 +5332,6 @@@ static void fill_stream_properties_from
  
        timing_out->aspect_ratio = get_aspect_ratio(mode_in);
  
-       stream->output_color_space = get_output_color_space(timing_out);
        stream->out_transfer_func->type = TF_TYPE_PREDEFINED;
        stream->out_transfer_func->tf = TRANSFER_FUNCTION_SRGB;
        if (stream->signal == SIGNAL_TYPE_HDMI_TYPE_A) {
                        adjust_colour_depth_from_display_info(timing_out, info);
                }
        }
+       stream->output_color_space = get_output_color_space(timing_out);
  }
  
  static void fill_audio_info(struct audio_info *audio_info,
@@@ -9685,8 -9670,8 +9675,8 @@@ static int amdgpu_dm_atomic_check(struc
                        goto fail;
                }
  
-               if (dm_old_con_state->abm_level !=
-                   dm_new_con_state->abm_level)
+               if (dm_old_con_state->abm_level != dm_new_con_state->abm_level ||
+                   dm_old_con_state->scaling != dm_new_con_state->scaling)
                        new_crtc_state->connectors_changed = true;
        }
  
@@@ -22,6 -22,7 +22,6 @@@
   */
  #include "pp_debug.h"
  #include <linux/delay.h>
 -#include <linux/fb.h>
  #include <linux/module.h>
  #include <linux/pci.h>
  #include <linux/slab.h>
@@@ -4202,7 -4203,7 +4202,7 @@@ static int smu7_freeze_sclk_mclk_dpm(st
  
        if ((0 == data->sclk_dpm_key_disabled) &&
                (data->need_update_smu7_dpm_table &
-                       (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
+                       (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) {
                PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),
                                "Trying to freeze SCLK DPM when DPM is disabled",
                                );
@@@ -4259,7 -4260,7 +4259,7 @@@ static int smu7_populate_and_upload_scl
        }
  
        if (data->need_update_smu7_dpm_table &
-                       (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK)) {
+                       (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK)) {
                result = smum_populate_all_graphic_levels(hwmgr);
                PP_ASSERT_WITH_CODE((0 == result),
                                "Failed to populate SCLK during PopulateNewDPMClocksStates Function!",
        }
  
        if (data->need_update_smu7_dpm_table &
-                       (DPMTABLE_OD_UPDATE_MCLK + DPMTABLE_UPDATE_MCLK)) {
+                       (DPMTABLE_OD_UPDATE_MCLK | DPMTABLE_UPDATE_MCLK)) {
                /*populate MCLK dpm table to SMU7 */
                result = smum_populate_all_memory_levels(hwmgr);
                PP_ASSERT_WITH_CODE((0 == result),
@@@ -4358,7 -4359,7 +4358,7 @@@ static int smu7_unfreeze_sclk_mclk_dpm(
  
        if ((0 == data->sclk_dpm_key_disabled) &&
                (data->need_update_smu7_dpm_table &
-               (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_UPDATE_SCLK))) {
+               (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_UPDATE_SCLK))) {
  
                PP_ASSERT_WITH_CODE(true == smum_is_dpm_running(hwmgr),
                                "Trying to Unfreeze SCLK DPM when DPM is disabled",
@@@ -22,6 -22,7 +22,6 @@@
   */
  #include <linux/module.h>
  #include <linux/slab.h>
 -#include <linux/fb.h>
  #include "linux/delay.h"
  #include <linux/types.h>
  #include <linux/pci.h>
@@@ -2202,7 -2203,7 +2202,7 @@@ static int ci_program_mem_timing_parame
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
  
        if (data->need_update_smu7_dpm_table &
-                       (DPMTABLE_OD_UPDATE_SCLK + DPMTABLE_OD_UPDATE_MCLK))
+                       (DPMTABLE_OD_UPDATE_SCLK | DPMTABLE_OD_UPDATE_MCLK))
                return ci_program_memory_timing_parameters(hwmgr);
  
        return 0;