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drm/xe/xe2lpg: Extend Wa_18041344222 to graphics IP 20.04
author
Harish Chegondi
<harish.chegondi@intel.com>
Tue, 10 Feb 2026 21:58:27 +0000
(13:58 -0800)
committer
Matt Roper
<matthew.d.roper@intel.com>
Fri, 20 Feb 2026 00:04:24 +0000
(16:04 -0800)
Apply WA
18041344222
to Xe2 LPG graphics IP version 20.04 too.
Bspec: 56024
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link:
https://patch.msgid.link/6e66746246439249a278f3d157f06071d83504b6.1770760591.git.harish.chegondi@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
drivers/gpu/drm/xe/xe_wa.c
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diff --git
a/drivers/gpu/drm/xe/xe_wa.c
b/drivers/gpu/drm/xe/xe_wa.c
index
7cb4ef2
..
76fa6d5
100644
(file)
--- a/
drivers/gpu/drm/xe/xe_wa.c
+++ b/
drivers/gpu/drm/xe/xe_wa.c
@@
-579,6
+579,12
@@
static const struct xe_rtp_entry_sr engine_was[] = {
FUNC(xe_rtp_match_first_render_or_compute)),
XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, RES_CHK_SPR_DIS))
},
+ { XE_RTP_NAME("18041344222"),
+ XE_RTP_RULES(GRAPHICS_VERSION(2004),
+ FUNC(xe_rtp_match_first_render_or_compute),
+ FUNC(xe_rtp_match_gt_has_discontiguous_dss_groups)),
+ XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))
+ },
/* Xe2_HPG */