ARM: dts: r7s72100: add sdhi clock to device tree

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 50f9f3b..eab0670 100644 (file)
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -149,6 +149,14 @@
                        >;
                        clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
                };
+               mstp12_clks: mstp12_clks@fcfe0444 {
+                       #clock-cells = <1>;
+                       compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
+                       reg = <0xfcfe0444 4>;
+                       clocks = <&p1_clk>, <&p1_clk>;
+                       clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>;
+                       clock-output-names = "sdhi1", "sdhi0";
+               };
        };
 
        cpus {

diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
index 5eaf0fb..29e01ed 100644 (file)
--- a/include/dt-bindings/clock/r7s72100-clock.h
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -44,4 +44,8 @@
 #define R7S72100_CLK_SPI3      4
 #define R7S72100_CLK_SPI4      3
 
+/* MSTP12 */
+#define R7S72100_CLK_SDHI0     3
+#define R7S72100_CLK_SDHI1     2
+
 #endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */