projects
/
linux-2.6-microblaze.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
6ec598c
)
drm/amdgpu: PWRBRK sequence changes for Aldebaran
author
Ashish Pawar
<ashish.pawar@amd.com>
Thu, 17 Jun 2021 05:51:23 +0000
(13:51 +0800)
committer
Alex Deucher
<alexander.deucher@amd.com>
Fri, 18 Jun 2021 21:11:49 +0000
(17:11 -0400)
Modify power brake enablement sequence on Aldebaran
Signed-off-by: Ashish Pawar <ashish.pawar@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
patch
|
blob
|
history
diff --git
a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
index
c0352dc
..
1769c4c
100644
(file)
--- a/
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
+++ b/
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
@@
-782,11
+782,6
@@
void gfx_v9_4_2_set_power_brake_sequence(struct amdgpu_device *adev)
tmp = REG_SET_FIELD(tmp, GC_THROTTLE_CTRL1, PWRBRK_STALL_EN, 1);
WREG32_SOC15(GC, 0, regGC_THROTTLE_CTRL1, tmp);
- WREG32_SOC15(GC, 0, regDIDT_IND_INDEX, ixDIDT_SQ_THROTTLE_CTRL);
- tmp = 0;
- tmp = REG_SET_FIELD(tmp, DIDT_SQ_THROTTLE_CTRL, PWRBRK_STALL_EN, 1);
- WREG32_SOC15(GC, 0, regDIDT_IND_DATA, tmp);
-
WREG32_SOC15(GC, 0, regGC_CAC_IND_INDEX, ixPWRBRK_STALL_PATTERN_CTRL);
tmp = 0;
tmp = REG_SET_FIELD(tmp, PWRBRK_STALL_PATTERN_CTRL, PWRBRK_END_STEP, 0x12);