drm/i915: add i9xx_display_irq_reset()

Add common i9xx_display_irq_reset() for display 2-4. The check for
I915_HAS_HOTPLUG() covers all the alternatives.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240916134720.501725-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 8f13f14..b830756 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -405,7 +405,7 @@ static void i9xx_pipe_crc_irq_handler(struct drm_i915_private *dev_priv,
                                     res1, res2);
 }
 
-void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)
+static void i9xx_pipestat_irq_reset(struct drm_i915_private *dev_priv)
 {
        enum pipe pipe;
 
@@ -1466,6 +1466,17 @@ void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
        dev_priv->irq_mask = ~0u;
 }
 
+void i9xx_display_irq_reset(struct drm_i915_private *i915)
+{
+       if (I915_HAS_HOTPLUG(i915)) {
+               i915_hotplug_interrupt_update(i915, 0xffffffff, 0);
+               intel_uncore_rmw(&i915->uncore,
+                                PORT_HOTPLUG_STAT(i915), 0, 0);
+       }
+
+       i9xx_pipestat_irq_reset(i915);
+}
+
 void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
 {
        struct intel_uncore *uncore = &dev_priv->uncore;

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index 2a090dd..093e356 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -54,6 +54,7 @@ void gen11_display_irq_handler(struct drm_i915_private *i915);
 u32 gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32 master_ctl);
 void gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir);
 
+void i9xx_display_irq_reset(struct drm_i915_private *i915);
 void vlv_display_irq_reset(struct drm_i915_private *i915);
 void gen8_display_irq_reset(struct drm_i915_private *i915);
 void gen11_display_irq_reset(struct drm_i915_private *i915);
@@ -68,7 +69,6 @@ u32 i915_pipestat_enable_mask(struct drm_i915_private *i915, enum pipe pipe);
 void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
 void i915_disable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
 void i915_enable_asle_pipestat(struct drm_i915_private *i915);
-void i9xx_pipestat_irq_reset(struct drm_i915_private *i915);
 
 void i9xx_pipestat_irq_ack(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
 

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d42997f..723d133 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -849,7 +849,7 @@ static void i8xx_irq_reset(struct drm_i915_private *dev_priv)
 {
        struct intel_uncore *uncore = &dev_priv->uncore;
 
-       i9xx_pipestat_irq_reset(dev_priv);
+       i9xx_display_irq_reset(dev_priv);
 
        gen2_irq_reset(uncore);
        dev_priv->irq_mask = ~0u;
@@ -1037,13 +1037,7 @@ static void i915_irq_reset(struct drm_i915_private *dev_priv)
 {
        struct intel_uncore *uncore = &dev_priv->uncore;
 
-       if (I915_HAS_HOTPLUG(dev_priv)) {
-               i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
-               intel_uncore_rmw(&dev_priv->uncore,
-                                PORT_HOTPLUG_STAT(dev_priv), 0, 0);
-       }
-
-       i9xx_pipestat_irq_reset(dev_priv);
+       i9xx_display_irq_reset(dev_priv);
 
        GEN3_IRQ_RESET(uncore, GEN2_);
        dev_priv->irq_mask = ~0u;
@@ -1148,10 +1142,7 @@ static void i965_irq_reset(struct drm_i915_private *dev_priv)
 {
        struct intel_uncore *uncore = &dev_priv->uncore;
 
-       i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
-       intel_uncore_rmw(uncore, PORT_HOTPLUG_STAT(dev_priv), 0, 0);
-
-       i9xx_pipestat_irq_reset(dev_priv);
+       i9xx_display_irq_reset(dev_priv);
 
        GEN3_IRQ_RESET(uncore, GEN2_);
        dev_priv->irq_mask = ~0u;