drm/amd/display: Optimize power up sequence for specific OLED

[why & how]
OLED power up sequence takes an extra 150ms via hardcoded delay,
but there is a strict requirement on DisplayOn resume time.
For customer panel, remove these delays to meet target until a
cleaner solution is can be put in place.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <Ovidiu.Bunea@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 6d76dc1..412cdb0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1067,6 +1067,7 @@ struct dc_debug_options {
        unsigned int sharpen_policy;
        unsigned int scale_to_sharpness_policy;
        bool skip_full_updated_if_possible;
+       unsigned int enable_oled_edp_power_up_opt;
 };
 
 

diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index 3401f4c..f077648 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -180,6 +180,7 @@ struct dc_panel_patch {
        unsigned int remove_sink_ext_caps;
        unsigned int disable_colorimetry;
        uint8_t blankstream_before_otg_off;
+       bool oled_optimize_display_on;
 };
 
 struct dc_edid_caps {

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
index c31ec44..427fd6e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
@@ -1039,7 +1039,8 @@ void dce110_edp_backlight_control(
        link_transmitter_control(ctx->dc_bios, &cntl);
 
        if (enable && link->dpcd_sink_ext_caps.bits.oled &&
-           !link->dc->config.edp_no_power_sequencing) {
+           !link->dc->config.edp_no_power_sequencing &&
+           !link->local_sink->edid_caps.panel_patch.oled_optimize_display_on) {
                post_T7_delay += link->panel_config.pps.extra_post_t7_ms;
                msleep(post_T7_delay);
        }

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index c4e0348..41cab9a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2082,6 +2082,9 @@ static enum dc_status enable_link_dp(struct dc_state *state,
        if (link_settings->link_rate == LINK_RATE_LOW)
                skip_video_pattern = false;
 
+       if (stream->sink_patches.oled_optimize_display_on)
+               set_default_brightness_aux(link);
+
        if (perform_link_training_with_retries(link_settings,
                                               skip_video_pattern,
                                               lt_attempts,
@@ -2105,10 +2108,14 @@ static enum dc_status enable_link_dp(struct dc_state *state,
        if (link->dpcd_sink_ext_caps.bits.oled == 1 ||
                link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1 ||
                link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1) {
-               set_default_brightness_aux(link);
-               if (link->dpcd_sink_ext_caps.bits.oled == 1)
-                       msleep(bl_oled_enable_delay);
-               edp_backlight_enable_aux(link, true);
+               if (!stream->sink_patches.oled_optimize_display_on) {
+                       set_default_brightness_aux(link);
+                       if (link->dpcd_sink_ext_caps.bits.oled == 1)
+                               msleep(bl_oled_enable_delay);
+                       edp_backlight_enable_aux(link, true);
+               } else {
+                       edp_backlight_enable_aux(link, true);
+               }
        }
 
        return status;