drm/i915: Add subslice stride runtime parameter

Add a new parameter, ss_stride, to the runtime info
structure. This is used to mirror the userspace concept
of subslice stride, which is a range of subslices per slice.

This patch simply adds the definition and updates usage
in the QUERY_TOPOLOGY_INFO handler.

v2: Add GEM_BUG_ON to make sure ss_stride is valid

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823160307.180813-4-stuart.summers@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c
index 6727079..edf39ae 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_sseu.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.c
@@ -14,6 +14,9 @@ void intel_sseu_set_info(struct sseu_dev_info *sseu, u8 max_slices,
        sseu->max_slices = max_slices;
        sseu->max_subslices = max_subslices;
        sseu->max_eus_per_subslice = max_eus_per_subslice;
+
+       sseu->ss_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
+       GEM_BUG_ON(sseu->ss_stride > GEN_MAX_SUBSLICE_STRIDE);
 }
 
 unsigned int

diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h
index 64e47da..8b8b562 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_sseu.h
+++ b/drivers/gpu/drm/i915/gt/intel_sseu.h
@@ -15,6 +15,7 @@ struct drm_i915_private;
 #define GEN_MAX_SLICES         (6) /* CNL upper bound */
 #define GEN_MAX_SUBSLICES      (8) /* ICL upper bound */
 #define GEN_SSEU_STRIDE(max_entries) DIV_ROUND_UP(max_entries, BITS_PER_BYTE)
+#define GEN_MAX_SUBSLICE_STRIDE GEN_SSEU_STRIDE(GEN_MAX_SUBSLICES)
 
 struct sseu_dev_info {
        u8 slice_mask;
@@ -33,6 +34,8 @@ struct sseu_dev_info {
        u8 max_subslices;
        u8 max_eus_per_subslice;
 
+       u8 ss_stride;
+
        /* We don't have more than 8 eus per subslice at the moment and as we
         * store eus enabled using bits, no need to multiply by eus per
         * subslice.

diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c
index ad9240a..d8e25dc 100644 (file)
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -37,7 +37,6 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
        const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
        struct drm_i915_query_topology_info topo;
        u32 slice_length, subslice_length, eu_length, total_length;
-       u8 subslice_stride = GEN_SSEU_STRIDE(sseu->max_subslices);
        u8 eu_stride = GEN_SSEU_STRIDE(sseu->max_eus_per_subslice);
        int ret;
 
@@ -50,7 +49,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
        BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask));
 
        slice_length = sizeof(sseu->slice_mask);
-       subslice_length = sseu->max_slices * subslice_stride;
+       subslice_length = sseu->max_slices * sseu->ss_stride;
        eu_length = sseu->max_slices * sseu->max_subslices * eu_stride;
        total_length = sizeof(topo) + slice_length + subslice_length +
                       eu_length;
@@ -69,7 +68,7 @@ static int query_topology_info(struct drm_i915_private *dev_priv,
        topo.max_eus_per_subslice = sseu->max_eus_per_subslice;
 
        topo.subslice_offset = slice_length;
-       topo.subslice_stride = subslice_stride;
+       topo.subslice_stride = sseu->ss_stride;
        topo.eu_offset = slice_length + subslice_length;
        topo.eu_stride = eu_stride;