clk: rockchip: move px30 critical clocks to correct clock controller

The clocks in the px30 critical clock section are from the regular cru not
the pmucru, so move them to the correct place.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20190917081903.25139-3-heiko@sntech.de

diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index a973394..5c77da1 100644 (file)
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -976,7 +976,7 @@ static struct rockchip_clk_branch px30_clk_pmu_branches[] __initdata = {
        GATE(0, "pclk_cru_pmu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, PX30_PMU_CLKGATE_CON(0), 8, GFLAGS),
 };
 
-static const char *const px30_pmucru_critical_clocks[] __initconst = {
+static const char *const px30_cru_critical_clocks[] __initconst = {
        "aclk_bus_pre",
        "pclk_bus_pre",
        "hclk_bus_pre",
@@ -1021,6 +1021,9 @@ static void __init px30_clk_init(struct device_node *np)
                                     &px30_cpuclk_data, px30_cpuclk_rates,
                                     ARRAY_SIZE(px30_cpuclk_rates));
 
+       rockchip_clk_protect_critical(px30_cru_critical_clocks,
+                                     ARRAY_SIZE(px30_cru_critical_clocks));
+
        rockchip_register_softrst(np, 12, reg_base + PX30_SOFTRST_CON(0),
                                  ROCKCHIP_SOFTRST_HIWORD_MASK);
 
@@ -1053,9 +1056,6 @@ static void __init px30_pmu_clk_init(struct device_node *np)
        rockchip_clk_register_branches(ctx, px30_clk_pmu_branches,
                                       ARRAY_SIZE(px30_clk_pmu_branches));
 
-       rockchip_clk_protect_critical(px30_pmucru_critical_clocks,
-                                     ARRAY_SIZE(px30_pmucru_critical_clocks));
-
        rockchip_clk_of_add_provider(np, ctx);
 }
 CLK_OF_DECLARE(px30_cru_pmu, "rockchip,px30-pmucru", px30_pmu_clk_init);