The list of GTs got splitted a while back between GT1
and GT2 on TGL.
References: https://patchwork.freedesktop.org/patch/388414/
CC: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
* PCI ID matches, otherwise we'll use the wrong info struct above.
*/
static const struct pci_device_id pciidlist[] = {
- XE_TGL_GT2_IDS(INTEL_VGA_DEVICE, &tgl_desc),
+ XE_TGL_IDS(INTEL_VGA_DEVICE, &tgl_desc),
XE_DG1_IDS(INTEL_VGA_DEVICE, &dg1_desc),
XE_ATS_M_IDS(INTEL_VGA_DEVICE, &ats_m_desc),
XE_DG2_IDS(INTEL_VGA_DEVICE, &dg2_desc),
MACRO__(0x9AF8, ## __VA_ARGS__)
#define XE_TGL_IDS(MACRO__, ...) \
- XE_TGL_GT1_IDS(MACRO__, ...), \
- XE_TGL_GT2_IDS(MACRO__, ...)
+ XE_TGL_GT1_IDS(MACRO__, ## __VA_ARGS__),\
+ XE_TGL_GT2_IDS(MACRO__, ## __VA_ARGS__)
/* RKL */
#define XE_RKL_IDS(MACRO__, ...) \