arm64: dts: st: add RIFSC as an access controller for STM32MP25x boards
authorGatien Chevallier <gatien.chevallier@foss.st.com>
Fri, 5 Jan 2024 13:03:59 +0000 (14:03 +0100)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Thu, 25 Apr 2024 13:00:29 +0000 (15:00 +0200)
RIFSC is a firewall controller. Add "st,stm32mp25-rifsc" compatible and
reference RIFSC as an access-control-provider. Keep "simple-bus"
compatible backward compatibility.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/st/stm32mp251.dtsi
arch/arm64/boot/dts/st/stm32mp255.dtsi

index 5dd4f35..af1444b 100644 (file)
                interrupt-parent = <&intc>;
                ranges = <0x0 0x0 0x0 0x80000000>;
 
-               rifsc: rifsc-bus@42080000 {
-                       compatible = "simple-bus";
+               rifsc: bus@42080000 {
+                       compatible = "st,stm32mp25-rifsc", "simple-bus";
                        reg = <0x42080000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
+                       #access-controller-cells = <1>;
                        ranges;
 
                        usart2: serial@400e0000 {
                                reg = <0x400e0000 0x400>;
                                interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&ck_flexgen_08>;
+                               access-controllers = <&rifsc 32>;
                                status = "disabled";
                        };
 
                                cap-sd-highspeed;
                                cap-mmc-highspeed;
                                max-frequency = <120000000>;
+                               access-controllers = <&rifsc 76>;
                                status = "disabled";
                        };
                };
index 17f197c..570c5dd 100644 (file)
@@ -5,22 +5,21 @@
  */
 #include "stm32mp253.dtsi"
 
-/ {
-       soc@0 {
-               rifsc: rifsc-bus@42080000 {
-                       vdec: vdec@480d0000 {
-                               compatible = "st,stm32mp25-vdec";
-                               reg = <0x480d0000 0x3c8>;
-                               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&ck_icn_p_vdec>;
-                       };
+&rifsc {
+       vdec: vdec@480d0000 {
+               compatible = "st,stm32mp25-vdec";
+               reg = <0x480d0000 0x3c8>;
+               interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&ck_icn_p_vdec>;
+               access-controllers = <&rifsc 89>;
 
-                       venc: venc@480e0000 {
-                               compatible = "st,stm32mp25-venc";
-                               reg = <0x480e0000 0x800>;
-                               interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&ck_icn_ls_mcu>;
-                       };
-               };
        };
-};
+
+       venc: venc@480e0000 {
+               compatible = "st,stm32mp25-venc";
+               reg = <0x480e0000 0x800>;
+               interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&ck_icn_ls_mcu>;
+               access-controllers = <&rifsc 90>;
+       };
+};
\ No newline at end of file