drm/i915/dsi: Fill BLLPs with blanking packets if requested

TGL/ADL DSI can be configured to fill all BLLPs with blanking
packets. Currently we enable that always, but the VBT actually
tells us whether this is desired or not. Hook that up.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260326111814.9800-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 6ea3792..45ba024 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -765,10 +765,11 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder,
                        }
                }
 
-               if (DISPLAY_VER(display) >= 12) {
-                       if (is_vid_mode(intel_dsi))
-                               tmp |= BLANKING_PACKET_ENABLE;
-               }
+               if (DISPLAY_VER(display) >= 12 &&
+                   is_vid_mode(intel_dsi) && intel_dsi->blanking_pkt)
+                       tmp |= BLANKING_PACKET_ENABLE;
+               else
+                       tmp &= ~BLANKING_PACKET_ENABLE;
 
                /* program DSI operation mode */
                if (is_vid_mode(intel_dsi)) {

diff --git a/drivers/gpu/drm/i915/display/icl_dsi_regs.h b/drivers/gpu/drm/i915/display/icl_dsi_regs.h
index b601b76..641e8f0 100644 (file)
--- a/drivers/gpu/drm/i915/display/icl_dsi_regs.h
+++ b/drivers/gpu/drm/i915/display/icl_dsi_regs.h
@@ -232,7 +232,7 @@
 #define  CALIBRATION_DISABLED          (0x0 << 4)
 #define  CALIBRATION_ENABLED_INITIAL_ONLY      (0x2 << 4)
 #define  CALIBRATION_ENABLED_INITIAL_PERIODIC  (0x3 << 4)
-#define  BLANKING_PACKET_ENABLE                (1 << 2)
+#define  BLANKING_PACKET_ENABLE                (1 << 2) /* tgl+ */
 #define  S3D_ORIENTATION_LANDSCAPE     (1 << 1)
 #define  EOTP_DISABLED                 (1 << 0)
 

diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h b/drivers/gpu/drm/i915/display/intel_dsi.h
index 0023ac3..f55d48e 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dsi.h
+++ b/drivers/gpu/drm/i915/display/intel_dsi.h
@@ -80,6 +80,7 @@ struct intel_dsi {
        /* NON_BURST_SYNC_PULSE, NON_BURST_SYNC_EVENTS, or BURST_MODE */
        int video_mode;
 
+       bool blanking_pkt;
        bool eot_pkt;
        bool clock_stop;
 

diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index 23da7f5..c544871 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -718,6 +718,7 @@ void intel_dsi_log_params(struct intel_dsi *intel_dsi)
                   "burst" : "<unknown>");
        drm_printf(&p, "Burst mode ratio %d\n", intel_dsi->burst_mode_ratio);
        drm_printf(&p, "Reset timer %d\n", intel_dsi->rst_timer_val);
+       drm_printf(&p, "Blanking packets during BLLP %s\n", str_enabled_disabled(intel_dsi->blanking_pkt));
        drm_printf(&p, "EoT packet %s\n", str_enabled_disabled(intel_dsi->eot_pkt));
        drm_printf(&p, "Clock stop during BLLP %s\n", str_enabled_disabled(intel_dsi->clock_stop));
        drm_printf(&p, "Mode %s\n", intel_dsi->operation_mode ? "command" : "video");
@@ -770,6 +771,7 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)
 
        drm_dbg_kms(display->drm, "\n");
 
+       intel_dsi->blanking_pkt = mipi_config->blanking_packets_during_bllp;
        intel_dsi->eot_pkt = !mipi_config->eot_pkt_disabled;
        intel_dsi->clock_stop = mipi_config->enable_clk_stop;
        intel_dsi->lane_count = mipi_config->lane_cnt + 1;