drm/amd/powerplay: refine pwm1_enable callback functions for Vega10.
authorRex Zhu <Rex.Zhu@amd.com>
Fri, 5 May 2017 09:44:32 +0000 (17:44 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 10 May 2017 17:36:28 +0000 (13:36 -0400)
Use the new enums for setting and getting the fan control mode.
Fixes problems due to previous inconsistencies between enums.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.h

index 85a6c12..ad30f5d 100644 (file)
@@ -3921,32 +3921,36 @@ static int vega10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
 
 static int vega10_set_fan_control_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
 {
-       if (mode) {
-               /* stop auto-manage */
-               if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
-                               PHM_PlatformCaps_MicrocodeFanControl))
-                       vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
-               vega10_fan_ctrl_set_static_mode(hwmgr, mode);
-       } else
-               /* restart auto-manage */
-               vega10_fan_ctrl_reset_fan_speed_to_default(hwmgr);
+       int result = 0;
 
-       return 0;
+       switch (mode) {
+       case AMD_FAN_CTRL_NONE:
+               result = vega10_fan_ctrl_set_fan_speed_percent(hwmgr, 100);
+               break;
+       case AMD_FAN_CTRL_MANUAL:
+               if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+                       PHM_PlatformCaps_MicrocodeFanControl))
+                       result = vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
+               break;
+       case AMD_FAN_CTRL_AUTO:
+               result = vega10_fan_ctrl_set_static_mode(hwmgr, mode);
+               if (!result)
+                       result = vega10_fan_ctrl_start_smc_fan_control(hwmgr);
+               break;
+       default:
+               break;
+       }
+       return result;
 }
 
 static int vega10_get_fan_control_mode(struct pp_hwmgr *hwmgr)
 {
-       uint32_t reg;
+       struct vega10_hwmgr *data = (struct vega10_hwmgr *)(hwmgr->backend);
 
-       if (hwmgr->fan_ctrl_is_in_default_mode) {
-               return hwmgr->fan_ctrl_default_mode;
-       } else {
-               reg = soc15_get_register_offset(THM_HWID, 0,
-                       mmCG_FDO_CTRL2_BASE_IDX, mmCG_FDO_CTRL2);
-               return (cgs_read_register(hwmgr->device, reg) &
-                               CG_FDO_CTRL2__FDO_PWM_MODE_MASK) >>
-                               CG_FDO_CTRL2__FDO_PWM_MODE__SHIFT;
-       }
+       if (data->smu_features[GNLD_FAN_CONTROL].enabled == false)
+               return AMD_FAN_CTRL_MANUAL;
+       else
+               return AMD_FAN_CTRL_AUTO;
 }
 
 static int vega10_get_dal_power_level(struct pp_hwmgr *hwmgr,
index 70c1d22..776f3a2 100644 (file)
@@ -79,6 +79,7 @@ extern int vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr,
 extern int vega10_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr);
 extern uint32_t smu7_get_xclk(struct pp_hwmgr *hwmgr);
 extern int vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr);
+int vega10_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr);
 
 #endif