hpd_rx_irq_work_suspend(dm);
- dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
-
- return 0;
+ return dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
}
struct amdgpu_dm_connector *
if (r)
DRM_ERROR("DMUB interface failed to initialize: status=%d\n", r);
- dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D0);
+ r = dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D0);
+ if (r)
+ return r;
+
dc_resume(dm->dc);
amdgpu_dm_irq_resume_early(adev);
}
/* power on hardware */
- dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D0);
+ r = dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D0);
+ if (r)
+ return r;
/* program HPD filter */
dc_resume(dm->dc);
dc->hwss.power_down_on_boot(dc);
}
-void dc_set_power_state(
+int dc_set_power_state(
struct dc *dc,
enum dc_acpi_cm_power_state power_state)
{
struct display_mode_lib *dml;
if (!dc->current_state)
- return;
+ return 0;
switch (power_state) {
case DC_ACPI_CM_POWER_STATE_D0:
ASSERT(dml);
if (!dml)
- return;
+ return -ENOMEM;
/* Preserve refcount */
refcount = dc->current_state->refcount;
break;
}
+
+ return 0;
}
void dc_resume(struct dc *dc)