drm/i915/adlp+/dp_mst: Align slave transcoder enabling with spec wrt. DDI function

On ADLP+ during modeset enabling configure the DDI function without
enabling it for MST slave transcoders before programming the data and
link M/N values. The DDI function gets enabled separately later in the
transcoder enabling sequence.

Align the code with the spec based on the above.

v2: Move this patch earlier in the series, addressing the DP2
    config fixes for all ADLP+ platforms later.

Bspec: 55424, 54128, 65448, 68849
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241030192313.4030617-3-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index bd5a595..13449c8 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -1224,7 +1224,7 @@ static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
        if (DISPLAY_VER(dev_priv) < 12 || !first_mst_stream)
                intel_ddi_enable_transcoder_clock(encoder, pipe_config);
 
-       if (DISPLAY_VER(dev_priv) >= 30 && !first_mst_stream)
+       if (DISPLAY_VER(dev_priv) >= 13 && !first_mst_stream)
                intel_ddi_config_transcoder_func(encoder, pipe_config);
 
        intel_dsc_dp_pps_write(&dig_port->base, pipe_config);