drm/i915: Fix PLL state check for gmch platforms
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 9 Feb 2024 18:38:05 +0000 (20:38 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 14 Feb 2024 23:41:26 +0000 (01:41 +0200)
GMCH DPLL state check was mistakenly removed in
commit 87fc875a2b85 ("drm/i915/dg2: Skip shared DPLL handling").
Bring it back.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240209183809.16887-2-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
drivers/gpu/drm/i915/display/intel_display.c

index 1b844ca..ba1c842 100644 (file)
@@ -5216,9 +5216,11 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 
        PIPE_CONF_CHECK_BOOL(double_wide);
 
-       if (dev_priv->display.dpll.mgr) {
+       if (dev_priv->display.dpll.mgr)
                PIPE_CONF_CHECK_P(shared_dpll);
 
+       /* FIXME convert everything over the dpll_mgr */
+       if (dev_priv->display.dpll.mgr || HAS_GMCH(dev_priv)) {
                PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
                PIPE_CONF_CHECK_X(dpll_hw_state.dpll_md);
                PIPE_CONF_CHECK_X(dpll_hw_state.fp0);