Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...

Pull x86 fixes from Ingo Molnar:
 "Misc fixes all over the place:

   - might_sleep() atomicity fix in the microcode loader

   - resctrl boundary condition fix

   - APIC arithmethics bug fix for frequencies >= 4.2 GHz

   - three 5-level paging crash fixes

   - two speculation fixes

   - a perf/stacktrace fix"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/unwind/orc: Fall back to using frame pointers for generated code
  perf/x86: Always store regs->ip in perf_callchain_kernel()
  x86/speculation: Allow guests to use SSBD even if host does not
  x86/mm: Handle physical-virtual alignment mismatch in phys_p4d_init()
  x86/boot/64: Add missing fixup_pointer() for next_early_pgt access
  x86/boot/64: Fix crash if kernel image crosses page table boundary
  x86/apic: Fix integer overflow on 10 bit left shift of cpu_khz
  x86/resctrl: Prevent possible overrun during bitmap operations
  x86/microcode: Fix the microcode load on CPU hotplug for real

diff --combined arch/x86/events/core.c
index 52a9746,4fb3ca1..3cd94a2
--- 1/arch/x86/events/core.c
--- 2/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@@ -561,14 -561,14 +561,14 @@@ int x86_pmu_hw_config(struct perf_even
        }
  
        /* sample_regs_user never support XMM registers */
 -      if (unlikely(event->attr.sample_regs_user & PEBS_XMM_REGS))
 +      if (unlikely(event->attr.sample_regs_user & PERF_REG_EXTENDED_MASK))
                return -EINVAL;
        /*
         * Besides the general purpose registers, XMM registers may
         * be collected in PEBS on some platforms, e.g. Icelake
         */
 -      if (unlikely(event->attr.sample_regs_intr & PEBS_XMM_REGS)) {
 -              if (x86_pmu.pebs_no_xmm_regs)
 +      if (unlikely(event->attr.sample_regs_intr & PERF_REG_EXTENDED_MASK)) {
 +              if (!(event->pmu->capabilities & PERF_PMU_CAP_EXTENDED_REGS))
                        return -EINVAL;
  
                if (!event->attr.precise_ip)
@@@ -2402,13 -2402,13 +2402,13 @@@ perf_callchain_kernel(struct perf_callc
                return;
        }
  
-       if (perf_hw_regs(regs)) {
-               if (perf_callchain_store(entry, regs->ip))
-                       return;
+       if (perf_callchain_store(entry, regs->ip))
+               return;
+ 
+       if (perf_hw_regs(regs))
                unwind_start(&state, current, regs, NULL);
-       } else {
+       else
                unwind_start(&state, current, NULL, (void *)regs->sp);
-       }
  
        for (; !unwind_done(&state); unwind_next_frame(&state)) {
                addr = unwind_get_return_address(&state);

diff --combined arch/x86/kernel/cpu/resctrl/rdtgroup.c
index 2131b8b,f9d8ed6..2f48247
--- 1/arch/x86/kernel/cpu/resctrl/rdtgroup.c
--- 2/arch/x86/kernel/cpu/resctrl/rdtgroup.c
+++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c
@@@ -1,4 -1,3 +1,4 @@@
 +// SPDX-License-Identifier: GPL-2.0-only
  /*
   * User interface for Resource Alloction in Resource Director Technology(RDT)
   *
@@@ -6,6 -5,15 +6,6 @@@
   *
   * Author: Fenghua Yu <fenghua.yu@intel.com>
   *
 - * This program is free software; you can redistribute it and/or modify it
 - * under the terms and conditions of the GNU General Public License,
 - * version 2, as published by the Free Software Foundation.
 - *
 - * This program is distributed in the hope it will be useful, but WITHOUT
 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 - * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 - * more details.
 - *
   * More information about RDT be found in the Intel (R) x86 Architecture
   * Software Developer Manual.
   */
@@@ -796,8 -804,12 +796,12 @@@ static int rdt_bit_usage_show(struct ke
                              struct seq_file *seq, void *v)
  {
        struct rdt_resource *r = of->kn->parent->priv;
-       u32 sw_shareable = 0, hw_shareable = 0;
-       u32 exclusive = 0, pseudo_locked = 0;
+       /*
+        * Use unsigned long even though only 32 bits are used to ensure
+        * test_bit() is used safely.
+        */
+       unsigned long sw_shareable = 0, hw_shareable = 0;
+       unsigned long exclusive = 0, pseudo_locked = 0;
        struct rdt_domain *dom;
        int i, hwb, swb, excl, psl;
        enum rdtgrp_mode mode;
@@@ -842,10 -854,10 +846,10 @@@
                }
                for (i = r->cache.cbm_len - 1; i >= 0; i--) {
                        pseudo_locked = dom->plr ? dom->plr->cbm : 0;
-                       hwb = test_bit(i, (unsigned long *)&hw_shareable);
-                       swb = test_bit(i, (unsigned long *)&sw_shareable);
-                       excl = test_bit(i, (unsigned long *)&exclusive);
-                       psl = test_bit(i, (unsigned long *)&pseudo_locked);
+                       hwb = test_bit(i, &hw_shareable);
+                       swb = test_bit(i, &sw_shareable);
+                       excl = test_bit(i, &exclusive);
+                       psl = test_bit(i, &pseudo_locked);
                        if (hwb && swb)
                                seq_putc(seq, 'X');
                        else if (hwb && !swb)
@@@ -2486,26 -2498,19 +2490,19 @@@ out_destroy
   */
  static void cbm_ensure_valid(u32 *_val, struct rdt_resource *r)
  {
-       /*
-        * Convert the u32 _val to an unsigned long required by all the bit
-        * operations within this function. No more than 32 bits of this
-        * converted value can be accessed because all bit operations are
-        * additionally provided with cbm_len that is initialized during
-        * hardware enumeration using five bits from the EAX register and
-        * thus never can exceed 32 bits.
-        */
-       unsigned long *val = (unsigned long *)_val;
+       unsigned long val = *_val;
        unsigned int cbm_len = r->cache.cbm_len;
        unsigned long first_bit, zero_bit;
  
-       if (*val == 0)
+       if (val == 0)
                return;
  
-       first_bit = find_first_bit(val, cbm_len);
-       zero_bit = find_next_zero_bit(val, cbm_len, first_bit);
+       first_bit = find_first_bit(&val, cbm_len);
+       zero_bit = find_next_zero_bit(&val, cbm_len, first_bit);
  
        /* Clear any remaining bits to ensure contiguous region */
-       bitmap_clear(val, zero_bit, cbm_len - zero_bit);
+       bitmap_clear(&val, zero_bit, cbm_len - zero_bit);
+       *_val = (u32)val;
  }
  
  /*