MIPS: Netlogic: Fixup memory regions for prefetch
authorJayachandran C <jchandra@broadcom.com>
Mon, 10 Jun 2013 06:41:08 +0000 (06:41 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 13 Jun 2013 15:46:43 +0000 (17:46 +0200)
Fix a cache error found in stress test, caused by the prefetch instruction
going beyond valid memory when acessing the last page of a region. Add
the pref_backup logic similar to XLR in XLP too.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5431/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/netlogic/xlp/setup.c

index 8f69924..7b638f7 100644 (file)
@@ -61,6 +61,18 @@ static void nlm_linux_exit(void)
                cpu_wait();
 }
 
+static void nlm_fixup_mem(void)
+{
+       const int pref_backup = 512;
+       int i;
+
+       for (i = 0; i < boot_mem_map.nr_map; i++) {
+               if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
+                       continue;
+               boot_mem_map.map[i].size -= pref_backup;
+       }
+}
+
 void __init plat_mem_setup(void)
 {
        panic_timeout   = 5;
@@ -70,6 +82,7 @@ void __init plat_mem_setup(void)
 
        /* memory and bootargs from DT */
        early_init_devtree(initial_boot_params);
+       nlm_fixup_mem();
 }
 
 const char *get_system_type(void)