amd-xgbe: define macros for MAC versions and speed select values

Define symbolic constants for MAC hardware version numbers and speed
select register values to improve code readability and maintainability.

This replaces magic numbers like 0x30, 0x33, 0x07, 0x06, etc. with
descriptive macro names that indicate their purpose:

MAC versions:
- XGBE_MAC_VER_30: Baseline version supporting Rx adaptation
- XGBE_MAC_VER_33: P100a platform version

Speed select values for MAC_TCR_SS register:
- XGBE_MAC_SS_10G: 10Gbps XGMII mode
- XGBE_MAC_SS_2_5G_GMII: 2.5Gbps GMII mode (older platforms)
- XGBE_MAC_SS_2_5G_XGMII: 2.5Gbps XGMII mode (P100a)
- XGBE_MAC_SS_1G: 1Gbps mode
- XGBE_MAC_SS_100M: 100Mbps mode
- XGBE_MAC_SS_10M: 10Mbps mode

No functional changes.

Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Link: https://patch.msgid.link/20260302044634.1388661-1-Raju.Rangoju@amd.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
index c04a9c7..1a91ec4 100644 (file)
--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c
@@ -722,16 +722,16 @@ static int xgbe_set_speed(struct xgbe_prv_data *pdata, int speed)
 
        switch (speed) {
        case SPEED_10:
-               ss = 0x07;
+               ss = XGBE_MAC_SS_10M;
                break;
        case SPEED_1000:
-               ss = 0x03;
+               ss = XGBE_MAC_SS_1G;
                break;
        case SPEED_2500:
-               ss = 0x02;
+               ss = XGBE_MAC_SS_2_5G_GMII;
                break;
        case SPEED_10000:
-               ss = 0x00;
+               ss = XGBE_MAC_SS_10G;
                break;
        default:
                return -EINVAL;

diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h
index 1269b8c..32cab96 100644 (file)
--- a/drivers/net/ethernet/amd/xgbe/xgbe.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe.h
@@ -267,6 +267,25 @@
 #define XGBE_GEN_HI_MASK       GENMASK(31, 16)
 #define XGBE_GEN_LO_MASK       GENMASK(15, 0)
 
+/* MAC hardware version numbers (SNPSVER field in MAC_VR register) */
+#define XGBE_MAC_VER_30                0x30    /* Baseline Rx adaptation support */
+#define XGBE_MAC_VER_33                0x33    /* P100a platform */
+
+/* MAC Speed Select (SS) values for MAC_TCR register
+ * These values are written to the SS field to configure link speed.
+ * Note: P100a uses XGMII mode (0x06) for 2.5G instead of GMII (0x02)
+ */
+/* Note: 100M and 2.5G GMII share the same value (0x02) but are
+ * differentiated by the mode/interface type at the PHY level
+ */
+
+#define XGBE_MAC_SS_10G                0x00    /* 10Gbps - XGMII mode */
+#define XGBE_MAC_SS_2_5G_GMII  0x02    /* 2.5Gbps - GMII mode (YC) */
+#define XGBE_MAC_SS_2_5G_XGMII 0x06    /* 2.5Gbps - XGMII mode (P100a) */
+#define XGBE_MAC_SS_1G         0x03    /* 1Gbps */
+#define XGBE_MAC_SS_100M       0x02    /* 100Mbps */
+#define XGBE_MAC_SS_10M                0x07    /* 10Mbps */
+
 struct xgbe_prv_data;
 
 struct xgbe_packet_data {