drm/i915/cfl: Introduce Coffee Lake platform definition.
authorRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 8 Jun 2017 15:49:58 +0000 (08:49 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Thu, 8 Jun 2017 16:55:08 +0000 (09:55 -0700)
Coffee Lake is a IntelĀ® Processor containing IntelĀ® HD Graphics
following Kabylake.

It is Gen9 graphics based platform on top of CNP PCH.

Let's start by adding the platform definition based on previous
platforms but yet as preliminary_hw_support.

On following patches we will start adding PCI IDs and the
platform specific changes.

v2: Also add BS2 ring that is present on GT3. As on KBL, according
    spec: "GT3 also has additional media blocks with second instance
    of VEBox and VDBox each", i.e. BSD2 ring in our case. Noticed
    when reviewing PCI ID patches.

v3: CFL_PLATFORM instead for CFL_FEATURES because it contains
    Platform information and no new features when compared to
    BDW_FEATURES definition.

v4: Rebased on top of Cannonlake patches.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1496937000-8450-1-git-send-email-rodrigo.vivi@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c

index f9632ea..dd22f3d 100644 (file)
@@ -825,6 +825,7 @@ enum intel_platform {
        INTEL_BROXTON,
        INTEL_KABYLAKE,
        INTEL_GEMINILAKE,
+       INTEL_COFFEELAKE,
        INTEL_CANNONLAKE,
        INTEL_MAX_PLATFORMS
 };
@@ -2768,6 +2769,7 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define IS_BROXTON(dev_priv)   ((dev_priv)->info.platform == INTEL_BROXTON)
 #define IS_KABYLAKE(dev_priv)  ((dev_priv)->info.platform == INTEL_KABYLAKE)
 #define IS_GEMINILAKE(dev_priv)        ((dev_priv)->info.platform == INTEL_GEMINILAKE)
+#define IS_COFFEELAKE(dev_priv)        ((dev_priv)->info.platform == INTEL_COFFEELAKE)
 #define IS_CANNONLAKE(dev_priv)        ((dev_priv)->info.platform == INTEL_CANNONLAKE)
 #define IS_MOBILE(dev_priv)    ((dev_priv)->info.is_mobile)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
index 224f5f9..03a495e 100644 (file)
@@ -422,6 +422,22 @@ static const struct intel_device_info intel_kabylake_gt3_info = {
        .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
+#define CFL_PLATFORM \
+       .is_alpha_support = 1, \
+       BDW_FEATURES, \
+       .gen = 9, \
+       .platform = INTEL_COFFEELAKE, \
+       .ddb_size = 896
+
+static const struct intel_device_info intel_coffeelake_info = {
+       CFL_PLATFORM,
+};
+
+static const struct intel_device_info intel_coffeelake_gt3_info = {
+       CFL_PLATFORM,
+       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
+};
+
 static const struct intel_device_info intel_cannonlake_info = {
        BDW_FEATURES,
        .is_alpha_support = 1,
index 91e68fd..77d3214 100644 (file)
@@ -51,6 +51,7 @@ static const char * const platform_names[] = {
        PLATFORM_NAME(BROXTON),
        PLATFORM_NAME(KABYLAKE),
        PLATFORM_NAME(GEMINILAKE),
+       PLATFORM_NAME(COFFEELAKE),
        PLATFORM_NAME(CANNONLAKE),
 };
 #undef PLATFORM_NAME