drm/amd/display: Using udelay for specific dongle while edid return defer

[why]
Some platform has a limitation of 2ms for udelay

[how]
Add 1ms udelay for specific dongle.

Signed-off-by: jinlong zhang <jinlong.zhang@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
index dec12de..ef0f50d 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c
@@ -39,6 +39,7 @@
 
 #define AUX_POWER_UP_WA_DELAY 500
 #define I2C_OVER_AUX_DEFER_WA_DELAY 70
+#define I2C_OVER_AUX_DEFER_WA_DELAY_1MS 1
 
 /* CV smart dongle slave address for retrieving supported HDTV modes*/
 #define CV_SMART_DONGLE_ADDRESS 0x20
@@ -287,6 +288,12 @@ static uint32_t defer_delay_converter_wa(
                        sizeof(link->dpcd_caps.branch_dev_name)))
                return defer_delay > I2C_OVER_AUX_DEFER_WA_DELAY ?
                        defer_delay : I2C_OVER_AUX_DEFER_WA_DELAY;
+               if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_006037 &&
+                       !memcmp(link->dpcd_caps.branch_dev_name,
+                               DP_DVI_CONVERTER_ID_5,
+                               sizeof(link->dpcd_caps.branch_dev_name)))
+               return defer_delay > I2C_OVER_AUX_DEFER_WA_DELAY_1MS ?
+                       I2C_OVER_AUX_DEFER_WA_DELAY_1MS : defer_delay;
 
        return defer_delay;
 }

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
index 743042d..cda5fd0 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c
@@ -652,8 +652,10 @@ bool dce_aux_transfer_with_retries(struct ddc_service *ddc,
                                } else {
                                        if ((*payload->reply == AUX_TRANSACTION_REPLY_AUX_DEFER) ||
                                                (*payload->reply == AUX_TRANSACTION_REPLY_I2C_OVER_AUX_DEFER)) {
-                                               if (payload->defer_delay > 0)
+                                               if (payload->defer_delay > 1)
                                                        msleep(payload->defer_delay);
+                                               else if (payload->defer_delay <= 1)
+                                                       udelay(payload->defer_delay * 1000);
                                        }
                                }
                                break;

diff --git a/drivers/gpu/drm/amd/display/include/ddc_service_types.h b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
index 9ad49da..c9be899 100644 (file)
--- a/drivers/gpu/drm/amd/display/include/ddc_service_types.h
+++ b/drivers/gpu/drm/amd/display/include/ddc_service_types.h
@@ -33,6 +33,7 @@
 #define DP_BRANCH_DEVICE_ID_0080E1 0x0080e1
 #define DP_BRANCH_DEVICE_ID_90CC24 0x90CC24
 #define DP_BRANCH_DEVICE_ID_00E04C 0x00E04C
+#define DP_BRANCH_DEVICE_ID_006037 0x006037
 
 enum ddc_result {
        DDC_RESULT_UNKNOWN = 0,
@@ -122,5 +123,6 @@ static const uint8_t DP_VGA_LVDS_CONVERTER_ID_2[] = "sivarT";
 static const uint8_t DP_VGA_LVDS_CONVERTER_ID_3[] = "dnomlA";
 /*DP to Dual link DVI converter*/
 static const uint8_t DP_DVI_CONVERTER_ID_4[] = "m2DVIa";
+static const uint8_t DP_DVI_CONVERTER_ID_5[] = "3393N2";
 
 #endif /* __DAL_DDC_SERVICE_TYPES_H__ */