{
struct mt7915_phy *phy = file->private_data;
struct mt7915_dev *dev = phy->dev;
- bool ext_phy = phy != &dev->phy;
+ bool band = phy->band_idx;
char buf[16];
int ret = 0;
u16 val;
* 8: trigger firmware crash.
*/
case SER_QUERY:
- ret = mt7915_mcu_set_ser(dev, 0, 0, ext_phy);
+ ret = mt7915_mcu_set_ser(dev, 0, 0, band);
break;
case SER_SET_RECOVER_L1:
case SER_SET_RECOVER_L2:
case SER_SET_RECOVER_L3_TX_ABORT:
case SER_SET_RECOVER_L3_TX_DISABLE:
case SER_SET_RECOVER_L3_BF:
- ret = mt7915_mcu_set_ser(dev, SER_ENABLE, BIT(val), ext_phy);
+ ret = mt7915_mcu_set_ser(dev, SER_ENABLE, BIT(val), band);
if (ret)
return ret;
- ret = mt7915_mcu_set_ser(dev, SER_RECOVER, val, ext_phy);
+ ret = mt7915_mcu_set_ser(dev, SER_RECOVER, val, band);
break;
/* enable full chip reset */
case SER_SET_RECOVER_FULL:
mt76_set(dev, MT_WFDMA0_MCU_HOST_INT_ENA, MT_MCU_CMD_WDT_MASK);
- ret = mt7915_mcu_set_ser(dev, 1, 3, ext_phy);
+ ret = mt7915_mcu_set_ser(dev, 1, 3, band);
if (ret)
return ret;
MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
}
-void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy)
+void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool band)
{
u32 reg;
- reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_RXTD12(ext_phy) :
- MT_WF_PHY_RXTD12_MT7916(ext_phy);
+ reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_RXTD12(band) :
+ MT_WF_PHY_RXTD12_MT7916(band);
mt76_set(dev, reg,
MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY |
MT_WF_PHY_RXTD12_IRPI_SW_CLR);
- reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_RX_CTRL1(ext_phy) :
- MT_WF_PHY_RX_CTRL1_MT7916(ext_phy);
+ reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_RX_CTRL1(band) :
+ MT_WF_PHY_RX_CTRL1_MT7916(band);
mt76_set(dev, reg, FIELD_PREP(MT_WF_PHY_RX_CTRL1_IPI_EN, 0x5));
}
static void mt7915_mac_severe_check(struct mt7915_phy *phy)
{
struct mt7915_dev *dev = phy->dev;
- bool ext_phy = phy != &dev->phy;
u32 trb;
if (!phy->omac_mask)
FIELD_GET(MT_TRB_RXPSR0_RX_WTBL_PTR, phy->trb_ts)) &&
trb == phy->trb_ts)
mt7915_mcu_set_ser(dev, SER_RECOVER, SER_SET_RECOVER_L3_RX_ABORT,
- ext_phy);
+ phy->band_idx);
phy->trb_ts = trb;
}
running = mt7915_dev_running(dev);
if (!running) {
- ret = mt76_connac_mcu_set_pm(&dev->mt76, 0, 0);
+ ret = mt76_connac_mcu_set_pm(&dev->mt76, dev->phy.band_idx, 0);
if (ret)
goto out;
- ret = mt7915_mcu_set_mac(dev, 0, true, true);
+ ret = mt7915_mcu_set_mac(dev, dev->phy.band_idx, true, true);
if (ret)
goto out;
- mt7915_mac_enable_nf(dev, 0);
+ mt7915_mac_enable_nf(dev, dev->phy.band_idx);
}
- if (phy != &dev->phy || phy->band_idx) {
- ret = mt76_connac_mcu_set_pm(&dev->mt76, 1, 0);
+ if (phy != &dev->phy) {
+ ret = mt76_connac_mcu_set_pm(&dev->mt76, phy->band_idx, 0);
if (ret)
goto out;
- ret = mt7915_mcu_set_mac(dev, 1, true, true);
+ ret = mt7915_mcu_set_mac(dev, phy->band_idx, true, true);
if (ret)
goto out;
- mt7915_mac_enable_nf(dev, 1);
+ mt7915_mac_enable_nf(dev, phy->band_idx);
}
ret = mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b,
- phy != &dev->phy);
+ phy->band_idx);
if (ret)
goto out;
clear_bit(MT76_STATE_RUNNING, &phy->mt76->state);
if (phy != &dev->phy) {
- mt76_connac_mcu_set_pm(&dev->mt76, 1, 1);
- mt7915_mcu_set_mac(dev, 1, false, false);
+ mt76_connac_mcu_set_pm(&dev->mt76, phy->band_idx, 1);
+ mt7915_mcu_set_mac(dev, phy->band_idx, false, false);
}
if (!mt7915_dev_running(dev)) {
- mt76_connac_mcu_set_pm(&dev->mt76, 0, 1);
- mt7915_mcu_set_mac(dev, 0, false, false);
+ mt76_connac_mcu_set_pm(&dev->mt76, dev->phy.band_idx, 1);
+ mt7915_mcu_set_mac(dev, dev->phy.band_idx, false, false);
}
mutex_unlock(&dev->mt76.mutex);
{
struct mt7915_dev *dev = mt7915_hw_dev(hw);
struct mt7915_phy *phy = mt7915_hw_phy(hw);
- bool band = phy != &dev->phy;
int ret;
if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
bool enabled = !!(hw->conf.flags & IEEE80211_CONF_MONITOR);
+ bool band = phy->band_idx;
if (!enabled)
phy->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
{
struct mt7915_dev *dev = mt7915_hw_dev(hw);
struct mt7915_phy *phy = mt7915_hw_phy(hw);
- bool band = phy != &dev->phy;
+ bool band = phy->band_idx;
u32 ctl_flags = MT_WF_RFCR1_DROP_ACK |
MT_WF_RFCR1_DROP_BF_POLL |
MT_WF_RFCR1_DROP_BA |
int ret;
mutex_lock(&dev->mt76.mutex);
- ret = mt76_connac_mcu_set_rts_thresh(&dev->mt76, val, phy != &dev->phy);
+ ret = mt76_connac_mcu_set_rts_thresh(&dev->mt76, val, phy->band_idx);
mutex_unlock(&dev->mt76.mutex);
return ret;
{
struct mt7915_dev *dev = mt7915_hw_dev(hw);
struct mt7915_phy *phy = mt7915_hw_phy(hw);
- bool band = phy != &dev->phy;
+ bool band = phy->band_idx;
union {
u64 t64;
u32 t32[2];
struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
struct mt7915_dev *dev = mt7915_hw_dev(hw);
struct mt7915_phy *phy = mt7915_hw_phy(hw);
- bool band = phy != &dev->phy;
+ bool band = phy->band_idx;
union {
u64 t64;
u32 t32[2];
struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
struct mt7915_dev *dev = mt7915_hw_dev(hw);
struct mt7915_phy *phy = mt7915_hw_phy(hw);
- bool band = phy != &dev->phy;
+ bool band = phy->band_idx;
union {
u64 t64;
u32 t32[2];
.mode = !!mask || enable,
.entry_count = 1,
.write = 1,
- .band = phy != &dev->phy,
+ .band = phy->band_idx,
.index = idx * 2 + bssid,
};
struct {
struct req_hdr {
u8 omac_idx;
- u8 dbdc_idx;
+ u8 band_idx;
__le16 tlv_num;
u8 is_tlv_append;
u8 rsv[3];
__le16 tag;
__le16 len;
u8 active;
- u8 dbdc_idx;
+ u8 band_idx;
u8 omac_addr[ETH_ALEN];
} __packed tlv;
} data = {
.hdr = {
.omac_idx = mvif->mt76.omac_idx,
- .dbdc_idx = mvif->mt76.band_idx,
+ .band_idx = mvif->mt76.band_idx,
.tlv_num = cpu_to_le16(1),
.is_tlv_append = 1,
},
.tag = cpu_to_le16(DEV_INFO_ACTIVE),
.len = cpu_to_le16(sizeof(struct req_tlv)),
.active = enable,
- .dbdc_idx = mvif->mt76.band_idx,
+ .band_idx = mvif->mt76.band_idx,
},
};
req.monitor_central_chan =
ieee80211_frequency_to_channel(chandef->center_freq1);
req.monitor_bw = mt76_connac_chan_bw(chandef);
- req.band_idx = phy != &dev->phy;
+ req.band_idx = phy->band_idx;
req.scan_mode = 1;
break;
}
req.monitor_chan = chandef->chan->hw_value;
req.monitor_central_chan =
ieee80211_frequency_to_channel(chandef->center_freq1);
- req.band_idx = phy != &dev->phy;
+ req.band_idx = phy->band_idx;
req.scan_mode = 2;
break;
case CH_SWITCH_BACKGROUND_SCAN_STOP:
}
for (i = 0; i < 5; i++) {
- req[i].band = cpu_to_le32(phy != &dev->phy);
+ req[i].band = cpu_to_le32(phy->band_idx);
req[i].offs = cpu_to_le32(offs[i + start]);
if (!is_mt7915(&dev->mt76) && i == 3)
struct {
u8 ctrl_id;
u8 action;
- u8 dbdc_idx;
+ u8 band_idx;
u8 rsv[5];
} req = {
.ctrl_id = THERMAL_SENSOR_TEMP_QUERY,
- .dbdc_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
};
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(THERMAL_CTRL), &req,
struct mt7915_sku_val {
u8 format_id;
u8 limit_type;
- u8 dbdc_idx;
+ u8 band_idx;
s8 val[MT7915_SKU_RATE_NUM];
} __packed req = {
.format_id = TX_POWER_LIMIT_TABLE,
- .dbdc_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
};
struct mt76_power_limits limits_array;
s8 *la = (s8 *)&limits_array;
struct {
u8 format_id;
u8 category;
- u8 band;
+ u8 band_idx;
u8 _rsv;
} __packed req = {
.format_id = TX_POWER_LIMIT_INFO,
.category = RATE_POWER_INFO,
- .band = phy != &dev->phy,
+ .band_idx = phy->band_idx,
};
s8 txpower_sku[MT7915_SKU_RATE_NUM][2];
struct sk_buff *skb;
struct mt7915_sku {
u8 format_id;
u8 sku_enable;
- u8 dbdc_idx;
+ u8 band_idx;
u8 rsv;
} __packed req = {
.format_id = TX_POWER_LIMIT_ENABLE,
- .dbdc_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
.sku_enable = enable,
};
struct mt7915_mcu_sr_ctrl req = {
.action = action,
.argnum = 1,
- .band_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
.val = cpu_to_le32(val),
};
.ctrl = {
.action = SPR_SET_PARAM,
.argnum = 9,
- .band_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
},
};
int ret;
.ctrl = {
.action = SPR_SET_SIGA,
.argnum = 1,
- .band_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
},
.siga = {
.omac = omac > HW_BSSID_MAX ? omac - 12 : omac,
.ctrl = {
.action = SPR_SET_SRG_BITMAP,
.argnum = 4,
- .band_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
},
};
u32 bitmap;
int ret;
struct {
u8 format_id;
- u8 dbdc_idx;
+ u8 band_idx;
s8 tx_power;
u8 ant_idx; /* Only 0 is valid */
u8 center_chan;
u8 rsv[3];
} __packed req = {
.format_id = 0xf,
- .dbdc_idx = phy != &dev->phy,
+ .band_idx = phy->band_idx,
.center_chan = ieee80211_frequency_to_channel(freq),
};
u8 *tx_power = NULL;
struct mt7915_tm_cmd req = {
.testmode_en = en,
.param_idx = MCU_ATE_SET_FREQ_OFFSET,
- .param.freq.band = phy != &dev->phy,
+ .param.freq.band = phy->band_idx,
.param.freq.freq_offset = cpu_to_le32(val),
};
.param_idx = MCU_ATE_SET_TRX,
.param.trx.type = type,
.param.trx.enable = en,
- .param.trx.band = phy != &dev->phy,
+ .param.trx.band = phy->band_idx,
};
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
.testmode_en = 1,
.param_idx = MCU_ATE_CLEAN_TXQUEUE,
.param.clean.wcid = wcid,
- .param.clean.band = phy != &dev->phy,
+ .param.clean.band = phy->band_idx,
};
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
.param.slot.sifs = sifs,
.param.slot.rifs = 2,
.param.slot.eifs = cpu_to_le16(60),
- .param.slot.band = phy != &dev->phy,
+ .param.slot.band = phy->band_idx,
};
return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(ATE_CTRL), &req,
mt7915_tm_update_channel(phy);
/* read-clear */
- mt76_rr(dev, MT_MIB_SDR3(phy != &dev->phy));
+ mt76_rr(dev, MT_MIB_SDR3(phy->band_idx));
mt7915_tm_set_trx(phy, TM_MAC_RX_RXV, en);
}
}
tx_cont->control_ch = chandef->chan->hw_value;
tx_cont->center_ch = freq1;
tx_cont->tx_ant = td->tx_antenna_mask;
- tx_cont->band = phy != &dev->phy;
+ tx_cont->band = phy->band_idx;
switch (chandef->width) {
case NL80211_CHAN_WIDTH_40:
}
if (!en) {
- req.op.rf.param.func_data = cpu_to_le32(phy != &dev->phy);
+ req.op.rf.param.func_data = cpu_to_le32(phy->band_idx);
goto out;
}