RISC-V: Add interrupt related SCAUSE defines in asm/csr.h

This patch adds SCAUSE interrupt flag and SCAUSE interrupt related
defines to asm/csr.h. We also use these defines in kernel/irq.c and
express SIE/SIP flags in-terms of SCAUSE interrupt causes.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 2ae54a7..a89a9bf 100644 (file)
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -51,10 +51,18 @@
 #define SATP_MODE      SATP_MODE_39
 #endif
 
-/* Interrupt Enable and Interrupt Pending flags */
-#define SIE_SSIE       _AC(0x00000002, UL) /* Software Interrupt Enable */
-#define SIE_STIE       _AC(0x00000020, UL) /* Timer Interrupt Enable */
-#define SIE_SEIE       _AC(0x00000200, UL) /* External Interrupt Enable */
+/* SCAUSE */
+#define SCAUSE_IRQ_FLAG                (_AC(1, UL) << (__riscv_xlen - 1))
+
+#define IRQ_U_SOFT             0
+#define IRQ_S_SOFT             1
+#define IRQ_M_SOFT             3
+#define IRQ_U_TIMER            4
+#define IRQ_S_TIMER            5
+#define IRQ_M_TIMER            7
+#define IRQ_U_EXT              8
+#define IRQ_S_EXT              9
+#define IRQ_M_EXT              11
 
 #define EXC_INST_MISALIGNED    0
 #define EXC_INST_ACCESS                1
@@ -66,6 +74,11 @@
 #define EXC_LOAD_PAGE_FAULT    13
 #define EXC_STORE_PAGE_FAULT   15
 
+/* SIE (Interrupt Enable) and SIP (Interrupt Pending) flags */
+#define SIE_SSIE               (_AC(0x1, UL) << IRQ_S_SOFT)
+#define SIE_STIE               (_AC(0x1, UL) << IRQ_S_TIMER)
+#define SIE_SEIE               (_AC(0x1, UL) << IRQ_S_EXT)
+
 #ifndef __ASSEMBLY__
 
 #define csr_swap(csr, val)                                     \

diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
index c738132..6d86593 100644 (file)
--- a/arch/riscv/kernel/irq.c
+++ b/arch/riscv/kernel/irq.c
@@ -14,17 +14,9 @@
 /*
  * Possible interrupt causes:
  */
-#define INTERRUPT_CAUSE_SOFTWARE    1
-#define INTERRUPT_CAUSE_TIMER       5
-#define INTERRUPT_CAUSE_EXTERNAL    9
-
-/*
- * The high order bit of the trap cause register is always set for
- * interrupts, which allows us to differentiate them from exceptions
- * quickly.  The INTERRUPT_CAUSE_* macros don't contain that bit, so we
- * need to mask it off.
- */
-#define INTERRUPT_CAUSE_FLAG   (1UL << (__riscv_xlen - 1))
+#define INTERRUPT_CAUSE_SOFTWARE       IRQ_S_SOFT
+#define INTERRUPT_CAUSE_TIMER          IRQ_S_TIMER
+#define INTERRUPT_CAUSE_EXTERNAL       IRQ_S_EXT
 
 int arch_show_interrupts(struct seq_file *p, int prec)
 {
@@ -37,7 +29,7 @@ asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs)
        struct pt_regs *old_regs = set_irq_regs(regs);
 
        irq_enter();
-       switch (regs->scause & ~INTERRUPT_CAUSE_FLAG) {
+       switch (regs->scause & ~SCAUSE_IRQ_FLAG) {
        case INTERRUPT_CAUSE_TIMER:
                riscv_timer_interrupt();
                break;