drm/nouveau/fb: read TILE_BASE after writing it to avoid a hardware race
authorBen Skeggs <bskeggs@redhat.com>
Wed, 10 Oct 2012 01:09:48 +0000 (11:09 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 28 Nov 2012 23:56:29 +0000 (09:56 +1000)
Apparently needed for turbocache nv4x chips at least, we'll just do it
everywhere...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c
drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c
drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c
drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c

index f037a42..1ecd703 100644 (file)
@@ -54,6 +54,7 @@ nv10_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
        nv_wr32(pfb, 0x100244 + (i * 0x10), tile->limit);
        nv_wr32(pfb, 0x100248 + (i * 0x10), tile->pitch);
        nv_wr32(pfb, 0x100240 + (i * 0x10), tile->addr);
+       nv_rd32(pfb, 0x100240 + (i * 0x10));
 }
 
 static int
index 2c30f23..307d5c7 100644 (file)
@@ -83,6 +83,7 @@ nv20_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
        nv_wr32(pfb, 0x100244 + (i * 0x10), tile->limit);
        nv_wr32(pfb, 0x100248 + (i * 0x10), tile->pitch);
        nv_wr32(pfb, 0x100240 + (i * 0x10), tile->addr);
+       nv_rd32(pfb, 0x100240 + (i * 0x10));
        nv_wr32(pfb, 0x100300 + (i * 0x04), tile->zcomp);
 }
 
index a6a1066..3c97417 100644 (file)
@@ -36,6 +36,7 @@ nv41_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
        nv_wr32(pfb, 0x100604 + (i * 0x10), tile->limit);
        nv_wr32(pfb, 0x100608 + (i * 0x10), tile->pitch);
        nv_wr32(pfb, 0x100600 + (i * 0x10), tile->addr);
+       nv_rd32(pfb, 0x100600 + (i * 0x10));
        nv_wr32(pfb, 0x100700 + (i * 0x04), tile->zcomp);
 }
 
index c62a077..538b0de 100644 (file)
@@ -46,6 +46,7 @@ nv44_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
        nv_wr32(pfb, 0x100604 + (i * 0x10), tile->limit);
        nv_wr32(pfb, 0x100608 + (i * 0x10), tile->pitch);
        nv_wr32(pfb, 0x100600 + (i * 0x10), tile->addr);
+       nv_rd32(pfb, 0x100600 + (i * 0x10));
 }
 
 int