PM / devfreq: tegra30: Disable clock on error in probe
authorDan Carpenter <dan.carpenter@oracle.com>
Tue, 8 Sep 2020 07:25:57 +0000 (10:25 +0300)
committerChanwoo Choi <cw00.choi@samsung.com>
Wed, 23 Sep 2020 04:35:58 +0000 (13:35 +0900)
This error path needs to call clk_disable_unprepare().

Fixes: 7296443b900e ("PM / devfreq: tegra30: Handle possible round-rate error")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
drivers/devfreq/tegra30-devfreq.c

index e94a278..dedd39d 100644 (file)
@@ -836,7 +836,8 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
        rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
        if (rate < 0) {
                dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
-               return rate;
+               err = rate;
+               goto disable_clk;
        }
 
        tegra->max_freq = rate / KHZ;
@@ -897,6 +898,7 @@ remove_opps:
        dev_pm_opp_remove_all_dynamic(&pdev->dev);
 
        reset_control_reset(tegra->reset);
+disable_clk:
        clk_disable_unprepare(tegra->clock);
 
        return err;