kbuild: pass $(MAKECMDGOALS) to sub-make as is

Manipulating $(MAKECMDGOALS) for sub-make seems odd to me.

[1] 'make O=foo sub-make' is turned into 'make O=foo', which builds
the default targets. It would make sense to terminate the build with:

  *** No rule to make target 'sub-make'.  Stop.

[2] 'make O=foo defconfig _all' is turned into 'make O=foo defconfig',
which changes the behavior.

Let's pass $(MAKECMDGOALS) as is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/Makefile b/Makefile
index f30b375..16c77f6 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -168,7 +168,7 @@ $(filter-out _all sub-make $(lastword $(MAKEFILE_LIST)), $(MAKECMDGOALS)) _all:
 sub-make:
        $(Q)$(MAKE) \
        $(if $(KBUILD_OUTPUT),-C $(KBUILD_OUTPUT) KBUILD_SRC=$(CURDIR)) \
-       -f $(CURDIR)/Makefile $(filter-out _all sub-make,$(MAKECMDGOALS))
+       -f $(CURDIR)/Makefile $(MAKECMDGOALS)
 
 endif # need-sub-make
 endif # sub_make_done